III-Nitride nanowire array monolithic photonic integrated circuit on (001)silicon operating at near-infrared wavelengths
Photonic devices such as semiconductor lasers and photodetectors of various operating wavelengths are grown monolithically on a Silicon substrate, and formed of nanowire structures with quantum structures as active regions. A reduction of strain during fabrication results from the use of these nanowire structures, thereby allowing devices to operate for extended periods of time at elevated temperatures. Monolithic photonic devices and monolithic photonic integrated circuits formed on Silicon substrates are thus provided.
1. A semiconductor device comprising:
a Silicon (Si) substrate; and
a III-Nitride nanowire structure having (i) a quantum region formed of one or more layers of InN quantum disks, (ii) a first graded layer region, and (iii) a second graded layer region, wherein the quantum region is located between the first graded layer region and the second graded layer region, and wherein the III-Nitride nanowire structure is monolithically grown from the Si substrate, and wherein the III-Nitride nanowire structure is responsive at or about 1.3 μm.
2. The semiconductor device of claim 1 , wherein quantum region comprises a plurality of InN quantum disk layers each having at least one quantum dot, at least one quantum arch-shaped form, at least one quantum dot within a quantum disk, at least one core-shell quantum structure, or a combination of thereof.
3. The semiconductor device of claim 2 , wherein each of the plurality of InN quantum disk layers has at least one quantum dot.
4. The semiconductor device of claim 3 , wherein each of the plurality of InN quantum disk layers is separated by an In x Ga 1−x N barrier.
5. The semiconductor device of claim 1 , wherein the III-nitride nanowire structure is an In-N nanowire structure, wherein the first graded region comprises a plurality of n-type In x Ga 1−x N layers, and the second graded region comprises a plurality of p-type In y Ga 1−y N layers.
6. The semiconductor device of claim 5 , where x is different for each of the plurality of n-type layers and wherein y is different for each of the plurality of p-type layers.
7. The semiconductor device of claim 1 , further comprising:
a lower region formed of one or more n-type GaN layers grown between the Si substrate and the first graded layer region; and
an upper region formed of one or more p-type GaN layers grown on the second graded layer region.
8. The semiconductor device of claim 1 , wherein the III-Nitride nanowire structure is formed as a nanowire semiconductor laser.
9. The semiconductor device of claim 1 , wherein the III-Nitride nanowire structure is formed as an edge emitting nanowire semiconductor laser.
10. The semiconductor device of claim 1 , wherein the III-Nitride nanowire structure is formed as vertical surface emitting nanowire semiconductor laser.
11. The semiconductor device of claim 1 , wherein the III-Nitride nanowire structure is formed as a nanowire semiconductor photodetector.
12. The semiconductor device of claim 1 , further comprising a Silicon Nitride layer coated on the Si substrate, such that the III-Nitride nanowire structure is monolithically grown from the Si substrate via the Silicon Nitride layer.
13. The semiconductor device of claim 1 , further comprising a Gallium Nitride layer coated on the Si substrate, such that the III-Nitride nanowire structure is monolithically grown from the Si substrate via the Gallium Nitride layer.
14. The nanowire array structure of claim 1 , wherein the plurality of III-Nitride nanowire structures form a nanowire semiconductor laser.
15. The nanowire array structure of claim 1 , wherein the plurality of III-Nitride nanowire structures form an edge emitting nanowire semiconductor laser.
16. The nanowire array structure of claim 1 , wherein the plurality of III-Nitride nanowire structures form a nanowire semiconductor photodetector.
17. A Nanowire array structure comprising:
a Silicon (Si) substrate; and
a plurality of III-Nitride nanowire structures each having (i) a quantum region formed of one or more layers of InN quantum disks, (ii) a first graded layer region, and (iii) a second graded layer region, wherein the quantum region is located between the first graded layer region and the second graded layer region,
wherein the plurality of III-Nitride nanowire structures are monolithically grown from the Si substrate, and
wherein the plurality of III-Nitride nanowire structures are responsive at or about 1.3 μm.
18. A photonic integrated circuit comprising:
a Silicon (Si) substrate;
a first plurality of III-Nitride Nanowire structures each having (i) a quantum region formed of one or more layers of inN quantum disks, (ii) a first graded layer region, and (iii) a second graded layer region, wherein the quantum region is located between the first graded layer region and the second graded layer region, wherein the first plurality of III-Nitride nanowire structures are monolithically grown from the Si substrate, and wherein the first plurality of III-Nitride nanowire structures form a nanowire semiconductor laser capable of emitting a photonic output at or about 1.3 μm; and
a second plurality of III-Nitride nanowire structures each having (i) a quantum region formed of one or more layers of InN quantum disks, (ii) a first graded layer region, and (iii) a second graded layer region, wherein the quantum region is located between the first graded layer region and the second graded layer region, wherein the second plurality of III-Nitride nanowire structures are monolithically grown from the Si substrate, and wherein the second plurality of III-Nitride nanowire structures form a nanowire semiconductor photodetector capable of absorbing a photon input at or about 1.3 μm.
19. The photonic integrated circuit of claim 18 , wherein the nanowire semiconductor laser and the nanowire semiconductor photodetector have the same heterostructure.
20. The photonic integrated circuit of claim 18 , wherein the nanowire semiconductor laser and the nanowire semiconductor photodetector are formed using a single-step selective-area growth epitaxial process.
21. The photonic integrated circuit of claim 18 , wherein the nanowire semiconductor laser and the nanowire semiconductor photodetector are formed using a multiple-step selective-area growth epitaxial process.
22. The photonic integrated circuit of claim 18 , further comprising a waveguide deposited on the Si substrate between the nanowire semiconductor laser and the nanowire semiconductor photodetector, wherein the waveguide is configured to propagate the photonic output from the nanowire semiconductor laser to the nanowire semiconductor photodetector.