Orthogonal frequency division multiplexing receiver with low-resolution analog to digital converter and electronic device thereof
The disclosure is directed to an OFDM receiver with a low-resolution ADC and an electronic device thereof. According to one of the exemplary embodiments, the OFDM receiver may include not limited to: an ADC module which receives a transmission signal of a channel in an analog format and digitizes the transmission signal into a digital format to generate a quantized transmission signal; an error compensating and estimating module which is coupled to the ADC module, receives the quantized transmission signal and a feedback signal which is a first estimated time-domain transmission signal to generate an estimated error signal according to a turbo iterative updating technique; and a signal estimating module which is coupled to the error compensating and estimating module, receives the estimated error signal and a channel attenuation coefficient of the channel to generate an estimated transmission signal.
1. An orthogonal frequency division multiplexing (OFDM) receiver comprising:
an ADC module which receives a transmission signal of a channel in an analog format and digitizes the transmission signal into a digital format to generate a quantized transmission signal;
an error compensating and estimating module which is coupled to the ADC module, receives the quantized transmission signal and a feedback signal which is a first estimated time-domain transmission signal to generate an estimated error signal according to a turbo iterative updating technique; and
a signal estimating module which is coupled to the error compensating and estimating module, receives the estimated error signal and a channel attenuation coefficient of the channel to directly output an estimated transmission signal, wherein the signal estimating module comprising:
a s-estimator which calculates the estimated transmission signal from the estimated error signal and the channel attenuation coefficient of the channel based on performing a minimum mean square error (MMSE) calculation or a zero forcing (ZF) calculation.
2. The receiver of claim 1 , wherein the signal estimating module further comprising:
a channel decoder which receives an output of the s-estimator to generate the estimated transmission signal by subtracting noise from the output of the s-estimator, wherein the channel decoder is one of a Turbo decoder, a LDPC decoder, a RS decoder, and a Viterbi decoder.
3. The receiver of claim 1 , wherein the signal estimating module generates the feedback signal at least by:
performing a product between a diagonal matrix operation of the channel attenuation coefficient and the estimated transmission signal to generate a second reconstructed frequency-domain transmission signal;
converting the second reconstructed frequency-domain transmission signal into a second reconstructed time-domain transmission signal;
converting the estimated error signal which is a second estimated frequency-domain transmission signal into a second estimated time-domain transmission signal; and
generating the feedback signal based on a difference between the second reconstructed frequency-domain transmission signal and the second estimated frequency domain transmission signal.
4. The receiver of claim 1 , wherein a number of iteration of turbo iterative updating technique is determined based on whether the number of iteration has exceeded a first threshold.
5. The receiver of claim 1 , wherein a number of iteration of turbo iterative updating technique is determined based on whether a variation between consecutive results of the estimated transmission signal exceeds a second threshold.
6. The receiver of claim 5 , wherein the number of iteration of turbo iterative updating technique is determined based on an output of the channel decoder or a result of cyclic redundancy check as more errors from the output of the channel decoder or the result of cyclic redundancy check would increase the number of iteration.
7. The receiver of claim 1 , wherein the error compensating and estimating module further comprises a z-estimator which receives the quantized transmission signal and generate a first reconstructed time-domain transmission signal.
8. The receiver of claim 7 , wherein the z-estimator generates the first reconstructed time-domain transmission signal by performing a second minimum mean square error (MMSE) calculation of the quantized transmission signal or by performing a second zero forcing (ZF) calculation of the quantized transmission signal.
9. The receiver of claim 7 , wherein the error compensating and estimating module generates the estimated error signal at least by:
converting the first reconstructed time-domain transmission signal into a first reconstructed frequency-domain transmission signal;
converting the feedback signal into a first estimated frequency domain transmission signal; and
generating the estimated error signal based on a difference between the first reconstructed frequency-domain transmission signal and the first estimated frequency domain transmission signal.
10. An electronic device comprising:
a processor; and
an OFDM receiver comprising:
an ADC module which receives a transmission signal of a channel in an analog format and digitizes the transmission signal into a digital format to generate a quantized transmission signal;
an error compensating and estimating module which is coupled to the ADC module, receives the quantized transmission signal and a feedback signal which is a first estimated time-domain transmission signal to generate an estimated error signal according to a turbo iterative updating technique; and
a signal estimating module which is coupled to the error compensating and estimating module, receives the estimated error signal and a channel attenuation coefficient of the channel to directly output an estimated transmission signal, wherein the signal estimating module comprising:
a s-estimator which calculates the estimated transmission signal from the estimated error signal and the channel attenuation coefficient of the channel based on performing a minimum mean square error (MMSE) calculation or a zero forcing (ZF) calculation.
11. The electronic device of claim 10 , wherein the signal estimating module further comprising:
a channel decoder which receives an output of the s-estimator to generate the estimated transmission signal by subtracting noise from the output of the s-estimator, wherein the channel decoder is one of a Turbo decoder, a LDPC decoder, a RS decoder, and a Viterbi decoder.
12. The electronic device of claim 10 , wherein the signal estimating module generates the feedback signal at least by:
performing a product between a diagonal matrix operation of the channel attenuation coefficient and the estimated transmission signal to generate a second reconstructed frequency-domain transmission signal;
converting the second reconstructed frequency-domain transmission signal into a second reconstructed time-domain transmission signal;
converting the estimated error signal which is a second estimated frequency-domain transmission signal into a second estimated time-domain transmission signal; and
generating the feedback signal based on a difference between the second reconstructed frequency-domain transmission signal and the second estimated frequency domain transmission signal.
13. The electronic device of claim 10 , wherein a number of iteration of turbo iterative updating technique is determined based on whether the number of iteration has exceeded a first threshold.
14. The electronic device of claim 10 , wherein a number of iteration of turbo iterative updating technique is determined based on whether a variation between consecutive results of the estimated transmission signal exceeds a second threshold.
15. The electronic device of claim 14 , wherein the number of iteration of turbo iterative updating technique is determined based on an output of the channel decoder or a result of cyclic redundancy check as more errors from the output of the channel decoder or the result of cyclic redundancy check would increase the number of iteration.
16. The electronic device of claim 10 , wherein the error compensating and estimating module further comprises a z-estimator which receives the quantized transmission signal and generate a first reconstructed time-domain transmission signal.
17. The electronic device of claim 16 , wherein the z-estimator generates the first reconstructed time-domain transmission signal by performing a second minimum mean square error (MMSE) calculation of the quantized transmission signal or by performing a second zero forcing (ZF) calculation of the quantized transmission signal.
18. The electronic device of claim 16 , wherein the error compensating and estimating module generates the estimated error signal at least by:
converting the first reconstructed time-domain transmission signal into a first reconstructed frequency-domain transmission signal;
converting the feedback signal into a first estimated frequency domain transmission signal; and
generating the estimated error signal based on a difference between the first reconstructed frequency-domain transmission signal and the first estimated frequency domain transmission signal.