IP Library › Granted Patent US 10,326,026
Granted Patent B2
US 10,326,026 · App. 15/440,437 · Granted Jun 18, 2019

Semiconductor device

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L27/1225H01L29/0657H01L29/0692H01L29/1033H01L29/24H01L29/4908H01L29/513H01L29/518H01L29/786H01L29/78618H01L29/78696
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,326,026
App. No.
15/440,437
Granted
Jun 18, 2019
Kind
B2
Abstract

Provided is a transistor which has favorable transistor characteristics and includes an oxide semiconductor, and a highly reliable semiconductor device which includes the transistor including the oxide semiconductor. In the semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode are stacked in this order, a sidewall insulating film is formed along side surfaces and a top surface of the gate electrode, and the oxide semiconductor film is subjected to etching treatment so as to have a cross shape having different lengths in the channel length direction or to have a larger length than a source electrode and a drain electrode in the channel width direction. Further, the source electrode and the drain electrode are formed in contact with the oxide semiconductor film.

Claims (23)

1. A semiconductor device comprising:

an oxide semiconductor film comprising:

a channel formation region;

a first region and a second region with the channel formation region interposed therebetween, which are in contact with the channel formation region; and

a third region and a fourth region with the channel formation region, the first region, and the second region interposed therebetween, which are in contact with the channel formation region;

a source electrode in contact with the first region;

a drain electrode in contact with the second region;

a gate electrode overlapping with the first region, the second region, the third region, and the fourth region; and

an insulating film between the oxide semiconductor film and the gate electrode,

wherein a sum of a channel length, a length of the first region in a channel length direction, and a length of the second region in the channel length direction is larger than a length of the gate electrode in the channel length direction, and

wherein a sum of a channel width, a length of the third region in a channel width direction, and a length of the fourth region in the channel width direction is larger than a length of any of the first region and the second region in the channel width direction.

2. The semiconductor device according to claim 1 , wherein the gate electrode is over the oxide semiconductor film.

3. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises indium, zinc, and a metal element other than indium and zinc.

4. The semiconductor device according to claim 3 , wherein the metal element is gallium.

5. The semiconductor device according to claim 1 , wherein the oxide semiconductor film has a cross shape.

6. The semiconductor device according to claim 1 ,

wherein the insulating film comprises:

a first insulating film comprising oxygen; and

a second insulating film comprising nitrogen between the first insulating film and the gate electrode.

7. The semiconductor device according to claim 1 , wherein a concentration of copper in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 .

8. The semiconductor device according to claim 1 , wherein a concentration of aluminum in the oxide semiconductor film is lower than or equal to 1×10 18 atoms/cm 3 .

9. The semiconductor device according to claim 1 , wherein a concentration of chlorine in the oxide semiconductor film is lower than or equal to 2×10 18 atoms/cm 3 .

10. The semiconductor device according to claim 1 , wherein each of the length of the third region and the length of the fourth region in the channel width direction is larger than the channel length.

Priority Claims (3)
JP 2012-010386 · Jan 20, 2012 · national
JP 2012-010404 · Jan 20, 2012 · national
JP 2012-010423 · Jan 20, 2012 · national
Continuity (3)
Division 14694291 · Apr 23, 2015
Division 13738484 · Jan 10, 2013
Related Publication 20170162701A1 · Jun 8, 2017
Cited By (2)
US 12,439,646 US 12,635,336