IP Library › Granted Patent US 10,332,931
Granted Patent B2
US 10,332,931 · App. 15/455,055 · Granted Jun 25, 2019

Semiconductor device for wafer-scale integration

Inventors: Cathal Cassidy (Okinawa, JP); Joerg Siegert (Graz, AT); Franz Schrank (Graz, AT)
Assignee: ams AG
H01L27/1469H01L24/32H01L24/83H01L27/14634H01L27/14636H01L27/14661H01L27/14663H01L27/14696H01L31/0296H01L31/02966H01L2924/14H01L2924/37001
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,332,931
App. No.
15/455,055
Granted
Jun 25, 2019
Kind
B2
Abstract

The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.

Claims (15)

1. A semiconductor device comprising:

a semiconductor wafer with an integrated circuit;

a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material;

the semiconductor wafer being bonded to the further semiconductor wafer by a bonding layer;

an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer; and

an electrically conductive layer connecting the contact layer with the integrated circuit,

wherein openings forming a pattern of trenches divide the semiconductor wafer and the further semiconductor wafer into a plurality of separate dies.

2. The semiconductor device of claim 1 , wherein the further semiconductor wafer comprises cadmium telluride or cadmium zinc telluride.

3. The semiconductor device of claim 1 or 2 , wherein the semiconductor wafer comprises silicon, and

wherein the further semiconductor wafer comprises a semiconductor material for x-ray conversion.

4. The semiconductor device of claim 1 or 2 , wherein the semiconductor wafer is less than 300 μm thick, and

wherein the further semiconductor wafer is at least 300 μm thick.

5. The semiconductor device of claim 1 or 2 , further comprising:

electrically conductive contact pads between the semiconductor wafer and the further semiconductor wafer; and

further electrically conductive layers connecting the contact pads with the integrated circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2019
From: CASSIDY, CATHAL; SIEGERT, JOERG; SCHRANK, FRANZ
To: AMS AG
Reel/Frame 048282/0663 →
Priority Claims (1)
EP 12168069 · May 15, 2012 · regional
Continuity (2)
Division 14401499
Related Publication 20170179183A1 · Jun 22, 2017
Cited By (3)
US 12,713,921 US 12,721,191 US 12,721,244