IP Library › Granted Patent US 10,332,990
Granted Patent B2
US 10,332,990 · App. 15/194,566 · Granted Jun 25, 2019

Semiconductor device

Inventor: Tatsuya Naito (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/7397H01L29/0649H01L29/0696H01L29/0619H01L29/0623H01L29/0834H01L29/1095H01L29/402H01L29/407H01L29/66348
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Quick Facts
Patent No.
US 10,332,990
App. No.
15/194,566
Granted
Jun 25, 2019
Kind
B2
Abstract

A semiconductor device is provided comprising a semiconductor substrate of a first conductivity type and a dummy trench portion having a main body portion and one or more branch portions, the main body portion formed in a front surface of the semiconductor substrate and extending in a predetermined extending direction, the branch portions extending from the main body portion in directions different from the extending direction. The semiconductor substrate has an emitter region of first conductivity type and a base region of a second conductivity type which are provided sequentially from the front surface side of the semiconductor substrate, and the dummy trench portion has a dummy trench which penetrates the emitter region and the base region from the front surface of the semiconductor substrate, and a dummy insulating portion which is provided within the dummy trench.

Claims (57)

1. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type; and

a dummy trench portion having a main body portion and a plurality of branch portions provided on both sides of the main body portion, the main body portion formed in a front surface of the semiconductor substrate and extending in a predetermined extending direction, the plurality of branch portions extending from the main body portion in directions different from the extending direction, the main body portion and the plurality of branch portions together forming a non-linear shape across the front surface of the semiconductor substrate, wherein

the semiconductor substrate has an emitter region of a first conductivity type and a base region of a second conductivity type which are provided sequentially from the front surface side of the semiconductor substrate,

the dummy trench portion has a dummy trench which penetrates the emitter region and the base region from the front surface of the semiconductor substrate, and a dummy insulating portion which is provided within the dummy trench,

the semiconductor substrate further has a contact region of a second conductivity type which is connected with the base region, and which has an impurity concentration higher than that of the base region and is exposed in the front surface of the semiconductor substrate, and

the branch portions are a non-active dummy trench,

a first front surface side emitter electrode directly contacts the emitter region and the contact region in an inner side wall of the dummy trench of the plurality of branch portions, and

at least some of the plurality of branch portions are provided inside the contact region in the front surface of the semiconductor substrate.

2. The semiconductor device according to claim 1 , wherein

the dummy insulating portion is filled from a bottom portion of the dummy trench to a predetermined height within the dummy trench.

3. The semiconductor device according to claim 2 , wherein

the branch portions extend in directions orthogonal to the extending direction of the main body portion.

4. The semiconductor device according to claim 2 , further comprising:

a gate trench portion formed in the front surface of the semiconductor substrate, wherein

the gate trench portion has a gate trench which penetrates the emitter region and the base region of the semiconductor substrate, and a gate conductive portion which is provided inside the gate trench,

the main body portion of the dummy trench portion is provided to face the gate trench,

the branch portions of the dummy trench portion are provided to extend toward the gate trench, and

at least some of the branch portions of the dummy trench portion are not in contact with the gate trench.

5. The semiconductor device according to claim 4 , wherein

the semiconductor substrate further has a contact region of a second conductivity type which is connected with the base region, has an impurity concentration higher than that of the base region and is exposed in the front surface of the semiconductor substrate, and

at least some of the branch portions are provided inside the contact region in the front surface of the semiconductor substrate.

6. The semiconductor device according to claim 4 , wherein

the extension of the branch portions from the main body portion is equal to or longer than a half of a distance between the main body portion of the dummy trench portion and the gate trench.

7. The semiconductor device according to claim 4 , wherein

each interval between the branch portions in the extending direction of the main body portion is shorter than a distance between the main body portion and the gate trench.

8. The semiconductor device according to claim 4 , wherein

the dummy trench is formed reaching to a position shallower than the gate trench.

9. The semiconductor device according to claim 8 , wherein

a width of the dummy trench in the main body portion is shorter than a width of the gate trench.

10. The semiconductor device according to claim 4 , wherein

the semiconductor substrate further has an accumulation region of a first conductivity type which is provided in a back surface side of the base region and has an impurity concentration higher than that of the semiconductor substrate, and

the dummy trench further penetrates the accumulation region.

11. The semiconductor device according to claim 4 , wherein

the semiconductor substrate further has a floating region of a second conductivity type separated from the base region in a region adjacent to the bottom portion of the dummy trench.

12. The semiconductor device according to claim 11 , wherein

a bottom portion of the floating region is provided in a position deeper than a bottom portion of the gate trench.

13. The semiconductor device according to claim 4 , wherein

the semiconductor substrate further has a well region of a second conductivity type which is provided outside the emitter region in the front surface of the semiconductor substrate and has an impurity concentration higher than that of the base region, and

the dummy trench of the branch portion provided in a position closest to the well region in the extending direction is formed reaching to a position deeper than the dummy trench of the other branch portion.

14. The semiconductor device according to claim 13 , wherein

a distance across the dummy trench of the branch portion closest to the well region is greater than a distance across the dummy trench of another branch portion.

15. The semiconductor device according to claim 4 , further comprising:

a first front surface side electrode which is provided above the front surface of the semiconductor substrate and is in contact with a front surface of the emitter region, wherein

the dummy insulating portion is filled within the dummy trench such that at least a part of the emitter region is exposed on a side wall of the dummy trench, and

the first front surface side electrode is also in contact with the emitter region in the side wall of the dummy trench.

16. The semiconductor device according to claim 15 , wherein

the gate trench portion further has a gate insulating portion which is provided above the gate conductive portion inside the gate trench and insulates the first front surface side electrode from the gate conductive portion.

17. The semiconductor device according to claim 4 , wherein

the gate trench portion includes one or more branch portions extending in directions different from the extending direction.

18. The semiconductor device according to claim 1 , wherein

the dummy trench portion is embedded with only an oxide film from a bottom portion through to the first front surface side emitter electrode.

19. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type; and

a non-active dummy trench portion having a main body portion and one or more branch portions, the main body portion formed in a front surface of the semiconductor substrate and extending in a predetermined extending direction, the one or more branch portions extending at least to a point equal to a width of the main body portion distant from the main body portion and less than a distance to a gate trench portion, from the main body portion in directions different from the extending direction, the main body portion and the one or more branch portions together forming a non-linear shape across the front surface of the semiconductor substrate, wherein

the semiconductor substrate has an emitter region of a first conductivity type and a base region of a second conductivity type which are provided sequentially from the front surface side of the semiconductor substrate, and

the non-active dummy trench portion has a dummy trench which penetrates the emitter region and the base region from the front surface of the semiconductor substrate, and a dummy insulating portion which is provided within the dummy trench.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2016
From: NAITO, TATSUYA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 039022/0778 →
Priority Claims (2)
JP 2015-141012 · Jul 15, 2015 · national
JP 2016-024546 · Feb 12, 2016 · national
Continuity (1)
Related Publication 20170018636A1 · Jan 19, 2017