Nitride semiconductor epitaxial wafer and field effect nitride transistor
A nitride semiconductor epitaxial wafer includes a substrate, a GaN layer provided over the substrate, and an AlGaN layer provided over the GaN layer. The GaN layer has a wurtzite crystal structure, and a ratio c/a of a lattice constant c in a c-axis orientation of the GaN layer to a lattice constant a in an a-axis orientation of the GaN layer is not more than 1.6266.
1. A nitride semiconductor epitaxial wafer, comprising:
a substrate;
a GaN layer configured to be an electron transit layer provided over the substrate;
an AlGaN layer configured to be an electron feed layer provided over the GaN layer;
wherein the GaN layer comprises a wurtzite crystal structure, and a measured ratio c/a of the lattice constant c in a c-axis orientation of the GaN layer to a lattice constant a in the a-axis orientation of the GaN layer is not more than 1.6266 despite the application of lattice mismatch stresses at interfaces between the GaN layer and the substrate and the AlGaN layer, and
wherein the measured ratio c/a allows the occurrence of only negative charges on the surface of the GaN layer on which a two-dimensional electron gas is induced spatially due to the lattice mismatch stresses to suppress current collapse.
2. The nitride semiconductor epitaxial wafer according to claim 1 , further comprising:
a single-layer or multilayer buffer layer provided between the substrate and the GaN layer.
3. The nitride semiconductor epitaxial wafer according to claim 2 , wherein the buffer layer comprises an AlN layer.
4. The nitride semiconductor epitaxial wafer according to claim 1 , wherein the substrate comprises a polytype 4H or polytype 6H silicon carbide.
5. A field effect nitride transistor, comprising:
a substrate;
a GaN layer configured to be an electron transit layer provided over the substrate;
an AlGaN layer configured to be an electron feed layer provided over the GaN layer;
a source electrode and a drain electrode provided directly or via an intermediate layer on the AlGaN layer, and
a gate electrode provided between the source electrode and the drain electrode,
wherein the GaN layer comprises a wurtzite crystal structure, and a measured ratio c/a of the lattice constant c in a c-axis orientation of the GaN layer to a lattice constant a in the a-axis orientation of the GaN layer is not more than 1.6266 despite the application of lattice mismatch stresses at interfaces between the GaN layer and the substrate and the AlGaN layer, and
wherein the measured ratio c/a allows the occurrence of only negative charges on the surface of the GaN layer on which a two-dimensional electron gas is induced spatially due to the lattice mismatch stresses to suppress current collapse.
6. The field effect nitride transistor according to claim 5 , further comprising:
a single-layer or multilayer buffer layer provided between the substrate and the GaN layer.
7. The field effect nitride transistor according to claim 6 , wherein the buffer layer comprises an AlN layer.
8. The field effect nitride transistor according to claim 5 , wherein the substrate comprises a polytype 4H or polytype 6H silicon carbide.
9. The field effect nitride transistor according to claim 5 , wherein the GaN layer directly contacts an AlN layer on one side and the AlGaN layer on the other side.
10. The field effect nitride transistor according to claim 5 , wherein the intermediate layer comprises a GaN layer.