IP Library › Granted Patent US 10,345,643
Granted Patent B2
US 10,345,643 · App. 15/795,186 · Granted Jul 9, 2019

Array substrate, production method of the same, and liquid crystal display panel and display apparatus comprising the same

Inventor: Haixu Li (Beijing, CN)
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
G02F1/133603G02F1/1362G02F1/1368G02F1/133608G02F1/133621H01L25/0753H01L27/1214H01L27/1259H01L33/0075H01L33/06G02F2001/133302G02F2202/10G02F2202/108H01L25/167H01L33/007H01L33/32H01L33/60
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Quick Facts
Patent No.
US 10,345,643
App. No.
15/795,186
Granted
Jul 9, 2019
Kind
B2
Abstract

This disclosure provides an array substrate for a liquid crystal display panel, comprising: a base substrate; a light-emitting diode back light source deposited on one surface of the base substrate; and thin film transistor on the other surface of the base substrate. This disclosure also provides a production method of an array substrate, a liquid crystal display panel, and a display apparatus.

Claims (50)

1. An array substrate for a liquid crystal display panel, comprising:

a base substrate;

a light-emitting diode back light source deposited on a first surface of the base substrate; and

a thin film transistor on a second surface of the base substrate;

wherein the light-emitting diode back light source comprises:

a GaN buffering layer deposited on said second surface of the base substrate,

three types of primary-color light-emitting chips arranged on the GaN buffering layer, wherein each primary-color light-emitting chip comprises:

a first electrode on the GaN buffering layer,

a first-type GaN layer on the first electrode,

a quantum well layer on the first-type GaN layer,

a second-type GaN layer on the quantum well layer, and

a second electrode on the second-type GaN layer.

2. The array substrate according to claim 1 , wherein

the first-type GaN layer is made of n-type GaN and the second-type GaN layer is made of p-type GaN; or

the first-type GaN layer is made of p-type GaN and the second-type GaN layer is made of n-type GaN.

3. The array substrate according to claim 1 , wherein the quantum well layer is doped or undoped indium gallium nitride.

4. The array substrate according to claim 3 , wherein:

the three types of primary-color light-emitting chips are red, green, and blue light-emitting chips;

the quantum well layer in the red light-emitting chip is undoped indium gallium nitride;

the quantum well layer in the green light-emitting chip is phosphorus- or arsenic-doped indium gallium nitride; and

the quantum well layer in the blue light-emitting chip is silicon-, carbon-, or aluminum-doped indium gallium nitride.

5. The array substrate according to claim 1 , wherein the light-emitting diode back light source further comprises a filling medium covering each primary-color light-emitting chip and a reflective layer on the filling medium.

6. The array substrate according to claim 1 , wherein:

the buffering layer has a thickness of 1000-3000 Å; the first electrode has a thickness of 500-2000 Å; the first-type GaN layer has a thickness of 1500-2500 Å; the quantum well layer has a thickness of 2000-3500 Å; the second-type GaN layer has a thickness of 1500-2500 Å; and the second electrode has a thickness of 500-2000 Å.

7. The array substrate according to claim 1 , wherein each primary-color light-emitting chip has a width of 3-10 μm.

8. A method for producing the array substrate for a liquid crystal display panel according to claim 1 , comprising:

depositing the light-emitting diode back light source on the first surface of the base substrate; and

forming the thin film transistor on the second surface of the base substrate.

9. The method according to claim 8 , wherein depositing the light-emitting diode back light source on the first surface of the base substrate comprises:

depositing gallium nitride on the surface of the base substrate to form a gallium nitride buffering layer;

depositing a first electrode layer on the gallium nitride buffering layer and exposing part of the gallium nitride buffering layer by patterning so as to produce a plurality of separately arranged first electrodes, each of which is used for one primary-color light-emitting chip of a plurality of primary-color light emitting chips;

depositing first-type gallium nitride on the first electrodes and the exposed gallium nitride buffering layer to form a first-type gallium nitride layer;

depositing indium gallium nitride on the first-type gallium nitride layer to form a quantum well layer;

doping the quantum well layer at each position of the primary-color light-emitting chips by using a mask, wherein the quantum well layer is doped with a different material at a position of one of the primary-color light-emitting chips with a different color;

depositing second-type gallium nitride on the quantum well layer to form a second-type gallium nitride layer;

patterning the first-type gallium nitride layer, the quantum well layer, and the second-type gallium nitride layer corresponding to the first electrodes;

depositing a second electrode on the second-type gallium nitride layer and patterning to form the primary-color light-emitting chips;

filling gaps between the primary-color light-emitting chips and covering the second electrode by using a filling medium; and

depositing a reflective layer on the filling medium.

10. The method according to claim 9 , wherein the primary-color light-emitting chips are red, green, and blue light-emitting chips, and doping the quantum well layer with a different material at a position of one of the primary-color light-emitting chips with a different color comprises:

doping the quantum well layer at the position of the green chip with phosphorus or arsenic; and

doping the quantum well layer at the position of the blue chip with silicon, carbon, or aluminum.

11. The method according to claim 9 , wherein:

the mask is a photoresist mask.

12. The method according to claim 9 , wherein said patterning the first-type gallium nitride layer, the quantum well layer, and the second-type gallium nitride layer comprises patterning by dry etching.

13. The method according to claim 9 , wherein said depositing a second electrode on the second-type gallium nitride layer and patterning comprises patterning by a wet etching process.

14. A liquid crystal display panel, comprising:

the array substrate according to claim 1 ; and

a liquid crystal panel mounted at a side of the thin film transistor of the array substrate.

15. A display apparatus comprising the liquid crystal display panel according to claim 14 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2017
From: LI, HAIXU
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 043963/0804 →
Priority Claims (1)
CN 2017 1 0183218 · Mar 24, 2017 · national
Continuity (1)
Related Publication 20180275462A1 · Sep 27, 2018
Cited By (1)
US 12,684,916