Field effect transistor contact with reduced contact resistance using implantation process

1. A method for semiconductor processing, the method comprising:

forming a source/drain region in an active area on a substrate, the source/drain region comprising germanium;

performing a first ion implantation process using gallium (Ga) to form an amorphous region in the source/drain region;

after performing the first ion implantation process, performing a second ion implantation process using a dopant into the amorphous region;

after performing the second ion implantation process, subjecting the amorphous region to a thermal process to form a crystalline region; and

after subjecting the amorphous region to the thermal process, forming a silicide region over the crystalline region.

2. The method of claim 1 , wherein the source/drain region is silicon germanium (SiGe), and germanium is in a range of about 20 atomic percent (at. %) to about 80 at. %.

3. The method of claim 1 , wherein ion implantation process using gallium (Ga) implants with a dosage of gallium in a range between about 1×10 15 A/cm 2 and about 2×10 16 A/cm 2 .

4. The method of claim 1 , wherein the first ion implantation process is performed at a temperature in a range from about −100° C. to about 30° C.

5. The method of claim 1 , wherein the dopant is a p-type dopant.

6. The method of claim 1 , wherein the dopant includes boron.

7. The method of claim 1 , wherein the thermal process includes a laser anneal process using a laser beam having a dwell time in a range from about 0.5 milliseconds to about 5 milliseconds.

8. A method for semiconductor processing, the method comprising:

forming a source/drain region in an active area on a substrate, the source/drain region comprising germanium having a concentration of about 20 atomic percent (at. %) or greater;

forming a dielectric layer over the active area;

forming an opening through the dielectric layer to expose at least a portion of an upper surface of the source/drain region;

implanting a first species comprising gallium into the exposed source/drain region;

after implanting the first species, implanting a second species comprising a p-type dopant into the exposed source/drain region;

after implanting the second species, subjecting the exposed source/drain region to a first anneal process operating at a first temperature window for a first duration;

after the first anneal process, subjecting the exposed source/drain region to a second anneal process operating at a second temperature window for a second duration, the second temperature window being higher than the first temperature window and the second duration being shorter than the first duration;

after subjecting the exposed source/drain region to a second anneal process, forming a silicide region at the upper surface of the exposed source/drain region; and

forming a conductive feature in the opening to the upper surface of the source/drain region.

9. The method of claim 8 , wherein the source/drain region is silicon germanium (SiGe), and the concentration of germanium is in a range from about 40 at. % to about 80 at. %.

10. The method of claim 8 , wherein the exposed source/drain region is implanted with a dosage of the first species in a range from about 1×10 15 A/cm 2 to about 2×10 16 A/cm 2 .

11. The method of claim 8 , wherein the first species are implanted in a temperature range from about −150° C. to about 450° C.

12. The method of claim 11 , wherein the first species are implanted in a temperature range from about −100° C. to about 30° C.

13. The method of claim 8 , wherein the first species are implanted using an energy in a range between about 0.5 keV and about 20 keV and a tilt angle between about 10 degrees to about 35 degrees.

14. The method of claim 8 , wherein the first anneal process includes a rapid thermal anneal process, and the first temperature window is in a range from about 400° C. to about 800° C. and the first duration is in a range from about 1 second to about 600 seconds, and the second anneal process includes a laser anneal process, and the second temperature window is in a range from about 900° C. to about 1200° C. and the second duration is in a range from about 0.5 milliseconds to about 5 milliseconds.

15. A method for semiconductor processing, the method comprising:

forming a source/drain region in an active area on a substrate, the source/drain region comprising germanium;

amorphizing an amorphized portion of the source/drain region;

after amorphizing, implanting a first dopant comprising a p-type dopant into the source/drain region;

after implanting the first dopant, performing a first anneal at a first temperature; and

after performing the first anneal, performing a second anneal at a second temperature, wherein the first anneal is a different type of anneal than the second anneal, wherein after performing the second anneal, a doped area having the first dopant is larger than an area of the amorphized portion.

16. The method of claim 15 , wherein the first dopant comprises a p-type dopant.

17. The method of claim 15 , wherein amorphizing the amorphized portion of the source/drain region is performed by implanting gallium.

18. The method of claim 15 , wherein the first anneal comprises a millisecond anneal and the second anneal comprises a rapid thermal anneal.

19. The method of claim 15 further comprising, after performing the second anneal, forming a silicide region on the source/drain region.

20. The method of claim 19 , wherein the silicide region is contained within the doped area.