IP Library › Granted Patent US 10,348,995
Granted Patent B2
US 10,348,995 · App. 15/520,470 · Granted Jul 9, 2019

Image sensor and imaging apparatus

Inventor: Kouichi Harada (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H04N5/378H01L27/14612H04N5/353H04N5/3745H03M1/12
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Quick Facts
Patent No.
US 10,348,995
App. No.
15/520,470
Granted
Jul 9, 2019
Kind
B2
Abstract

Presence or absence of a photon is accurately detected in an image sensor with a simple configuration. A pixel circuit generates as an input voltage a signal voltage by photoelectrically converting light when the light is incident, and generates as the input voltage a predetermined reset voltage when light is not incident. A capacitor retains the predetermined reset voltage as a retained voltage. An amplification comparator amplifies a voltage difference between the input voltage and the retained voltage. A detection comparator outputs a result of determining whether or not the amplified voltage difference is higher than a predetermined value, as a detection signal indicating detected presence or absence of light incidence.

Claims (49)

1. An image sensor, comprising:

a pixel circuit configured to:

generate as an input voltage, a signal voltage by photoelectric conversion of light when the light is incident; and

generate as the input voltage, a reset voltage when the light is absent;

a capacitor configured to retain the reset voltage as a retained voltage;

an amplification comparator configured to amplify a first voltage difference between the input voltage and the retained voltage, for generation of a comparison target voltage; and

a detection comparator configured to:

output a result of a determination that the amplified first voltage difference is higher than a value, as a detection signal indicating one of detected presence of the incident light or absence of the light;

amplify a first voltage obtained by an addition of an input offset voltage to a second voltage difference between the retained voltage and the comparison target voltage; and

output the amplified first voltage as the detection signal.

2. The image sensor according to claim 1 , further comprising:

a control unit configured to control the capacitor to retain the reset voltage when the light is absent.

3. The image sensor according to claim 2 ,

wherein the amplification comparator is further configured to:

amplify a third voltage difference between terminal voltages of a pixel circuit side input terminal connected to the pixel circuit and a capacitor side input terminal connected to the capacitor, and

output a second voltage corresponding to the amplified third voltage difference from an output terminal, and

wherein the control unit is further configured to control the capacitor to retain the reset voltage by interterminal short-circuit of the capacitor side input terminal and the output terminal.

4. The image sensor according to claim 1 ,

wherein the amplification comparator is further configured to amplify the first voltage difference between the input voltage and the retained voltage with a again, and

wherein the input offset voltage is approximately equal to a half of a value obtained by an amplification of a third voltage difference between the reset voltage and the signal voltage with the gain.

5. The image sensor according to claim 1 ,

wherein the detection comparator includes a pair of differential transistors configured to amplify the first voltage obtained by the addition of the input offset voltage to the second voltage difference between the retained voltage and the comparison target voltage.

6. The image sensor according to claim 5 ,

wherein the input offset voltage includes an adjustment offset component corresponding to a third voltage difference between threshold voltages of the pair of differential transistors.

7. The image sensor according to claim 5 ,

wherein the input offset voltage includes an adjustment offset component corresponding to a difference between gate widths of the pair of differential transistors.

8. The image sensor according to claim 5 ,

wherein the input offset voltage includes an adjustment offset component corresponding to a difference between gate lengths of the pair of differential transistors.

9. The image sensor according to claim 5 ,

wherein the input offset voltage includes an adjustment offset component corresponding to a difference between film thicknesses of gate oxide films of the pair of differential transistors.

10. The image sensor according to claim 1 ,

wherein the amplification comparator comprises a pair of differential transistors connected to a pixel circuit side input terminal connected to the pixel circuit and a capacitor side input terminal connected to the capacitor,

wherein the image sensor further includes a first buffer amplifier, and

wherein the first buffer amplifier is configured to:

expand a dynamic range of a differential transistor connected to the capacitor side input terminal, and

reduce an impedance of an output terminal of the amplification comparator.

11. The image sensor according to claim 1 , further comprising

a second buffer amplifier configured to reduce an impedance of an output terminal of the detection comparator.

12. An imaging apparatus, comprising:

a pixel circuit configured to:

generate as an input voltage, a signal voltage by photoelectric conversion of light when the light is incident; and

generate as the input voltage, a reset voltage when the light is absent;

a capacitor configured to retain the reset voltage as a retained voltage;

an amplification comparator configured to amplify a first voltage difference between the input voltage and the retained voltage, for generation of a comparison target voltage;

a detection comparator configured to:

output a result of a determination that the amplified first voltage difference is higher than a value, as a detection signal indicating one of detected presence of the incident light or absence of the light;

amplify a voltage obtained by an addition of an input offset voltage to a second voltage difference between the retained voltage and the comparison target voltage; and

output the amplified voltage as the detection signal; and

a signal processing circuit configured to process the detection signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2017
From: HARADA, KOUICHI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 042286/0822 →
Priority Claims (1)
JP 2014-221240 · Oct 30, 2014 · national
Continuity (1)
Related Publication 20180309948A1 · Oct 25, 2018