LLC power converter and switching method thereof

1. A method comprising:

detecting a second current pulse at a gate of a low-side switch of an inductor-inductor-capacitor (LLC) power converter, wherein detecting the second current pulse comprises detecting a second current that flows in a second direction from the gate of the low-side switch toward a driver circuit of the low-side switch;

turning on a high-side switch of the LLC power converter after detecting the second current pulse;

turning off the high-side switch of the LLC power converter after turning on the high-side switch;

detecting a first current pulse at the gate of the low-side switch of the LLC power converter after turning off the high-side switch, wherein detecting the first current pulse comprises detecting a first current that flows in a first direction from the driver circuit of the low-side switch toward the gate of the low-side switch; and

turning on the low-side switch of the LLC power converter after detecting the first current pulse.

2. The method of claim 1 , wherein the high-side switch comprises a first transistor and the low-side switch comprises a second transistor, wherein a drain of the high-side switch is coupled to a power supply node, a source of the high-side switch is coupled to a drain of the low-side switch, and a source of the low-side switch is coupled to a reference voltage node.

3. The method of claim 1 , wherein detecting the first current pulse comprises detecting the first current having a peak value larger than a first current threshold.

4. The method of claim 3 , wherein the first current threshold is between about 0.1 mA and about 100 mA.

5. The method of claim 1 , wherein detecting the first current pulse comprises detecting the first current pulse 2 μs or more after turning off the high-side switch.

6. The method of claim 1 , wherein detecting the first current pulse comprises measuring a first voltage across a resistor coupled between the gate of the low-side switch and the driver circuit of the low-side switch.

7. The method of claim 6 , wherein the resistor is integrated into a same integrated circuit as the low-side switch.

8. The method of claim 1 , wherein detecting the second current pulse comprises detecting the second current having a peak value of larger than a second current threshold.

9. The method of claim 8 , wherein the second current threshold is between about 0.1 mA and about 100 mA.

10. The method of claim 8 , further comprising detecting a third current pulse a time period before detecting the second current pulse.

11. The method of claim 10 , wherein the time period is between about 200 ns to about 500 ns.

12. The method of claim 10 , wherein detecting the third current pulse comprises detecting a third current that flows in the second direction from the gate of the low-side switch toward the driver circuit of the low-side switch.

13. A controller in a half-bridge inductor-inductor-capacitor (LLC) power converter system having a high-side transistor and a low-side transistor, the controller configured to:

detect a second current pulse at a gate of the low-side transistor, wherein detecting the second current pulse comprises detecting a second current flowing out of the gate of the low-side transistor;

switching the high-side transistor on after detecting the second current pulse;

switch the high-side transistor off after switching the high-side transistor on;

detect a first current pulse at the gate of the low-side transistor after switching the high-side transistor off, wherein detecting the first current pulse comprises detecting a first current that flows into the gate of the low-side transistor; and

upon detecting the first current pulse, switch the low-side transistor on.

14. The controller of claim 13 , wherein the first current has a peak value that is larger than a first threshold, wherein the first threshold is between about 0.1 mA and about 100 mA.

15. The controller of claim 14 , wherein detecting the first current pulse comprises detecting the first current pulse about 2 μs or more after switching the high-side transistor off.

16. The controller of claim 13 , wherein switching the high-side transistor on comprises switching the high-side transistor on 2 μs or more after detecting the second current pulse.

17. The controller of claim 13 , wherein the second current has a peak value that is larger than a second threshold, wherein the second threshold is between about 0.1 mA and about 100 mA.

18. The controller of claim 13 , further configured to detect a third current pulse a time period before detecting the second current pulse.

19. The controller of claim 18 , wherein the time period is between about 200 ns to about 500 ns.

20. The controller of claim 18 , wherein detecting the third current pulse comprises detecting a third current that flows out of the gate of the low-side transistor.

21. The controller of claim 13 , further configured to, upon detecting the first current pulse, declare that the half-bridge LLC power converter system enters a capacitive mode.

22. The controller of claim 13 , further configured to:

monitor an output voltage of the half-bridge LLC power converter system; and

adjust a switching frequency of the half-bridge LLC power converter system in accordance with the output voltage.

23. A power system comprising:

an inductor-inductor-capacitor (LLC) converter comprising:

a switching bridge comprising a high-side transistor and a low-side transistor;

an LLC tank coupled to the switching bridge, the LLC tank comprising a first inductor, a first capacitor, and a second inductor;

a transformer coupled to the LLC tank, the transformer comprising a primary winding and a secondary winding; and

a controller coupled to the high-side transistor and the low-side transistor, wherein the controller is configured to:

detect a second current pulse at a gate of the low-side transistor, wherein detecting the second current pulse comprises detecting a second current that flows out of the gate of the low-side transistor;

turn on the high-side transistor after detecting the second current pulse;

turn off the high-side transistor after turning on the high-side transistor;

detect a first current pulse at the gate of the low-side transistor after turning off the high-side transistor, wherein detecting the first current pulse comprises detecting a first current that flows into the gate of the low-side transistor; and

turn on the low-side transistor after detecting the first current pulse.

24. The power system of claim 23 , wherein a first time interval between turning off the high-side transistor and detecting the first current pulse is larger than about 2 μs, wherein a second time interval between detecting the second current pulse and turning on the high-side transistor is between about 200 ns to about 500 ns.

25. The power system of claim 24 , further comprising a current sensing circuit coupled between the controller and the gate of the low-side transistor.

26. The power system of claim 25 , wherein the current sensing circuit comprises a resistor coupled between the gate of the low-side transistor and a driver circuit of the low-side transistor.

27. The power system of claim 25 , wherein the current sensing circuit comprises a pair of anti-parallel diodes coupled between the gate of the low-side transistor and a driver circuit of the low-side transistor.

28. The power system of claim 24 , wherein a drain of the high-side transistor is coupled to a power supply node, a source of the high-side transistor is coupled to a drain of the low-side transistor, and a source of the low-side transistor is coupled to a reference voltage node.