Predicted instruction execution in parallel processors with reduced per-thread state information including choosing a minimum or maximum of two operands based on a predicate value

1. A computer-implemented method for accessing predicate information associated with a thread group, the method comprising:

receiving a first instruction for execution by the thread group wherein the first instruction specifies a first source operand identifier, an operation, and a first destination predicate identifier;

for each thread in the thread group,

computing a predicate result by applying the operation to data in a first source operand included in a local register file and identified by the first source operand identifier, and

storing the predicate result in a first predicate of a first predicate register included in a predicate register file and associated with the thread, wherein the first predicate is identified by the first destination predicate identifier, and the predicate register file is separate from the local register file and includes a different predicate register for each thread in the thread group,

wherein the first source operand is different for each thread in the thread group and the first predicate register associated with the thread is different for each thread in the thread group; and

receiving a first guarded instruction for execution by the thread group, wherein the first guarded instruction specifies the first destination predicate identifier and comprises a minimum/maximum instruction that specifies a third source operand identifier and a fourth source operand identifier; and

for each thread in the thread group, executing the minimum/maximum instruction by:

in response to the first predicate of the first predicate register being set to a first value, performing a minimum operation on data in a third source operand identified by the third source operand identifier and data in a fourth source operand identified by the fourth source operand identifier, and

in response to the first predicate being set to a second value, performing a maximum operation on the data in the third source operand and the data in the fourth source operand.

2. The method of claim 1 , wherein the operation compares the data in the first source operand with zero.

3. The method of claim 1 , wherein the first instruction further specifies a second source operand and the operation compares the data in the first source operand with data in the second source operand.

4. The method of claim 3 , wherein the first instruction further specifies a fifth source operand identifier and a combinatorial operation, and the step of computing a predicate result also includes applying the combinatorial operation to data in a fifth source operand identified by the fifth source operand identifier and a value associated with the comparison of the data in the first source operand and the second source operand.

5. The method of claim 4 , wherein the fifth source operand comprises a predicate.

6. The method of claim 3 , wherein the first predicate represents a first result of the operation.

7. The method of claim 3 , wherein the first source operand and the second source operand comprise a predicate.

8. The method of claim 1 , further comprising the step of receiving a second guarded instruction for execution by the thread group that specifies the first destination predicate identifier.

9. The method of claim 8 , wherein the second guarded instruction comprises a select instruction that specifies a fifth source operand identifier and a sixth source operand identifier, and further comprising the step of, for each thread in the thread group, determining, based on the first predicate register, whether to select data in a fifth source operand identified by the fifth source operand identifier or data in a sixth source operand identified by the sixth source operand identifier.

10. The method of claim 8 , wherein the second guarded instruction comprises a branch instruction that specifies a third instruction, and further comprising the step of, for each thread in the thread group, determining, based on the first predicate register, whether the third instruction should be the next instruction executed.

11. The method of claim 1 , wherein the first predicate register further comprises a plurality of condition code bits.

12. The method of claim 11 , further comprising:

for each thread in the thread group,

computing a condition code result by applying the operation to the data in a first source operand; and

storing the condition code result in a third bit of the first predicate register associated with the thread, wherein the plurality of condition code bits includes the third bit.

13. The method of claim 1 , wherein the first instruction is one of an ISETP, FSETP, DSETP, PSETP, CSETP, or VSETP instruction corresponding to a set predicate instruction for integer, single-precision floating point, double-precision floating point, predicate, condition code, and sub-word operands, respectively.

14. The method of claim 1 , further comprising receiving a second instruction for execution by the thread group wherein the second instruction specifies that the first predicate register is to be copied into a first portion of a register within the local register file.

15. The method of claim 1 , further comprising receiving a second instruction for execution by the thread group wherein the second instruction specifies that a first portion of a register within the local register file is to be copied into the first predicate register.

16. The method of claim 1 , wherein computing the predicate result comprises:

extracting a sub-word value from the first source operand;

sign extending the sub-word value to generate a sign-extended value;

performing a comparison operation associated with the sign-extended value to generate an intermediate result; and

combining the intermediate result with a predicate source operand to generate the predicate result.