Focal plane array processing method and apparatus
A digital focal plane array includes an all-digital readout integrated circuit in combination with a detector array. The readout circuit includes unit cell electronics, orthogonal transfer structures, and data handling structures. The unit cell electronics include an analog to digital converter. Orthogonal transfer structures enable the orthogonal transfer of data among the unit cells. Data handling structures may be configured to operate the digital focal plane array as a data encryptor/decipherer. Data encrypted and deciphered by the digital focal plane array need not be image data.
1. An apparatus comprising:
a two-dimensional array of photodetectors; and
a two-dimensional array of analog-to-digital converters (ADCs) operably coupled to the two-dimensional array of photodetectors,
wherein at least one ADC in the two-dimensional array of ADCs comprises:
a modulo M counter to store a count value representing a current generated by a corresponding photodetector in the two-dimensional array of photodetectors, and
wherein the apparatus is configured to perform image differencing based on the count value stored in the modulo M counter.
2. The apparatus of claim 1 , wherein M is the product of two prime numbers.
3. The apparatus of claim 1 , wherein the modulo M counter is a bidirectional counter.
4. The apparatus of claim 1 , wherein the at least one ADC further comprises a capacitor to integrate the current generated by the corresponding photodetector.
5. The apparatus of claim 4 , wherein the at least one ADC further comprises at least one of a voltage-to-frequency converter or a comparator to convert a voltage across the capacitor to a signal that increments or decrements the count value stored in the modulo M counter.
6. A method comprising:
generating a photocurrent with a photodetector in a two-dimensional array of photodetectors;
converting the photocurrent into a digital signal with an analog-to-digital converter (ADC) in a two-dimensional array of ADCs;
storing a count value representing the digital signal in a modulo M counter operably coupled to the ADC; and
performing image differencing based at least in part on the count value stored in the modulo M counter.
7. The method of claim 6 , wherein storing the count value comprises storing an integer remainder of a division by M.
8. The method of claim 6 , wherein M is the product of two prime numbers.
9. The method of claim 6 , wherein storing the count value comprises at least one of incrementing or decrementing the modulo M counter in response to the digital signal.
10. The method of claim 6 , wherein converting the photocurrent comprises integrating the photocurrent with a capacitor.
11. The method of claim 10 , wherein converting the photocurrent further comprises converting a voltage across the capacitor to yield the digital signal.
12. The method of claim 6 , further comprising:
changing the count value stored in the modulo M counter to 0 in response to the digital count value surpassing M.
13. The method of claim 6 , further comprising reading the modulo M counter before accumulating an amount of charge equal to a virtual well depth W virt :
W
Virt
=
MG
e
(
φ
scene
(
φ
scene
-
φ
Back
)
)
electrons
where G e is gain, φ scene represents a scene photon flux, and φ Back represents a background photon flux.
14. The method of claim 6 , further comprising:
determining, based on the image differencing, a velocity of an object in a scene imaged by the two-dimensional array of photodetectors.
15. The method of claim 6 , further comprising:
determining, based on the image differencing, a difference between a scene imaged by the two-dimensional array of photodetectors and a reference image.
16. The apparatus of claim 1 , wherein the count value is an integer remainder of a division by M.
17. The apparatus of claim 1 , wherein the modulo M counter is configured to change the count value stored in the modulo M counter to 0 in response to the count value surpassing M.
18. The apparatus of claim 1 , wherein the modulo M counter comprises a linear feedback shift register.
19. The apparatus of claim 1 , wherein the modulo M counter defines a virtual well depth W virt representing an amount of charge that can be accumulated and digitized before a readout.
20. The apparatus of claim 19 , wherein the virtual well depth W virt is given by:
W
Virt
=
MG
e
(
φ
scene
(
φ
scene
-
φ
Back
)
)
electrons
where G e is gain, φ scene represents a scene photon flux, and φ Back represents a background photon flux.