IP Library › Granted Patent US 10,372,519
Granted Patent B2
US 10,372,519 · App. 15/374,662 · Granted Aug 6, 2019

Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management

Inventors: Charles J. Camp (Sugar Land, TX); Timothy J. Fisher (Cypress, TX); Aaron D. Fry (Richmond, TX); Nikolas Ioannou (Zurich, CH); Roman Pletka (Uster, CH); Sasa Tomic (Kilchberg, CH)
Assignee: International Business Machines Corporation
G06F11/076G06F3/0619G06F3/0647G06F3/0653G06F3/0688G06F11/073G06F11/0793G06F11/1072G11C29/52
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Quick Facts
Patent No.
US 10,372,519
App. No.
15/374,662
Granted
Aug 6, 2019
Kind
B2
Abstract

Non-volatile memory block management. A method according to one embodiment includes calculating an error count margin threshold for each of the at least some non-volatile memory blocks of a plurality of non-volatile memory blocks. A determination is made as to whether the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded. A memory block management function is triggered upon determining that the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded.

Claims (38)

1. A system, comprising:

a plurality of non-volatile memory blocks configured to store data; and

a controller and logic integrated with and/or executable by the controller, the logic being configured to:

calculate an error count margin threshold for each of at least some of the non-volatile memory blocks;

determine whether the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded; and

trigger a memory block management function upon determining that the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded,

wherein the calculating and the determining for each of the at least some of the non-volatile memory blocks improves performance of the system by preventing any of the at least some of the non-volatile memory blocks from being skipped over during the calculating and the determining.

2. The system as recited in claim 1 , wherein the memory block management function includes setting an indicator.

3. The system as recited in claim 1 , wherein the memory block management function includes performing an immediate calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold.

4. The system as recited in claim 1 , wherein the memory block management function includes scheduling a calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold, wherein the calibration is scheduled to be performed during a subsequent background health check.

5. The system as recited in claim 1 , wherein the memory block management function includes scheduling a calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold, wherein the calibration is performed during a currently ongoing background health check iteration.

6. The system as recited in claim 1 , wherein the logic is configured to:

reduce a block health of the non-volatile memory blocks having the exceeded error count margin threshold, thereby extending a life span of the plurality of non-volatile memory blocks.

7. The system as recited in claim 1 , wherein a non-volatile memory block is retired when the error count margin threshold of the non-volatile memory block reaches a block retirement error count limit.

8. The system as recited in claim 1 , wherein the non-volatile memory is a NAND Flash memory, wherein the error count margin threshold of each non-volatile memory block is individually updated over time, with a proviso that Flash memory block index tables are not maintained and/or monitored.

9. The system as recited in claim 1 , the logic being configured to:

determine a block health of each of the at least some of the non-volatile memory blocks,

wherein the block health of each of the at least some of the non-volatile memory blocks corresponds to a highest number of errors associated with a single error correction code codeword in the respective block.

10. A method, comprising:

calculating an individual error count margin threshold for each of more than one non-volatile memory blocks of a plurality of non-volatile memory blocks;

for each of the more than one non-volatile memory blocks, determining whether the respective error count margin threshold has been exceeded; and

triggering a memory block management function upon determining that the error count margin threshold of any of the more than one non-volatile memory blocks has been exceeded,

wherein the calculating and the determining for each of the more than one non-volatile memory blocks improves performance of the plurality of non-volatile memory blocks by preventing any of the more than one non-volatile memory blocks from being skipped over during the calculating and the determining.

11. The method as recited in claim 10 , wherein the memory block management function includes setting an indicator.

12. The method as recited in claim 10 , wherein the memory block management function includes performing an immediate calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold.

13. The method as recited in claim 10 , wherein the memory block management function includes scheduling a calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold, wherein the calibration is scheduled to be performed during a subsequent background health check.

14. The method as recited in claim 10 , wherein the memory block management function includes scheduling a calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold, wherein the calibration is performed during a currently ongoing background health check iteration.

15. The method as recited in claim 10 , comprising: reducing a block health of the non-volatile memory blocks having the exceeded error count margin threshold, thereby extending a life span of the plurality of non-volatile memory blocks.

16. The method as recited in claim 10 , wherein a non-volatile memory block is retired when the error count margin threshold of the non-volatile memory block reaches a block retirement error count limit.

17. The method as recited in claim 10 , wherein the error count margin threshold of each non-volatile memory block is individually updated over time.

18. The method as recited in claim 10 , wherein the non-volatile memory is a NAND Flash memory in a storage apparatus, wherein the memory block management function includes scheduling a calibration of at least the non-volatile memory blocks having the exceeded error count margin threshold, wherein the calibration is based on a priority level associated with each of the respective non-volatile memory blocks having the exceeded error count margin threshold, wherein the calculating and the determining is performed for every non-volatile memory block in the storage apparatus.

19. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a controller to cause the controller to:

calculate, by the controller, an error count margin threshold for each of at least some non-volatile memory blocks of a plurality of the non-volatile memory blocks;

determine, by the controller, whether the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded; and

trigger, by the controller, a memory block management function upon determining that the error count margin threshold of any of the at least some of the non-volatile memory blocks has been exceeded,

wherein the memory block management function includes setting an indicator,

wherein the calculating and the determining for each of the at least some of the non-volatile memory blocks improves performance of the plurality of non-volatile memory blocks by preventing any of the at least some of the non-volatile memory blocks from being skipped over during the calculating and the determining.

20. The computer program product as recited in claim 19 , wherein the error count margin threshold of each of the at least some non-volatile memory blocks is individually updated over time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2016
From: CAMP, CHARLES J.; FISHER, TIMOTHY J.; FRY, AARON D.; IOANNOU, NIKOLAS; PLETKA, ROMAN; TOMIC, SASA
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 040726/0634 →
Continuity (2)
Continuation 14520276 · Oct 21, 2014
Related Publication 20170091006A1 · Mar 30, 2017