Updating write-in-place storage devices

1. A system, comprising:

a write-in-place memory device comprising a redundant storage structure, the memory device configured to store data across a set of stripes of the redundant storage structure; and

a controller for the memory device, the controller configured to:

receive updated data for at least one portion of a plurality of portions of a dataset stored across a first stripe, each portion of the plurality of portions comprising respective error correction code (ECC) parity;

generate a new parity for the at least one portion based on the updated data without reading the at least one portion of the dataset from the first stripe; and

overwrite the at least one portion of the dataset across the first stripe with the updated data and the new parity.

2. The system of claim 1 , wherein the controller is configured to generate the new parity without reading the dataset from the first stripe.

3. The system of claim 1 , wherein the controller is configured to generate the new parity without reading a previous parity for the dataset.

4. The system of claim 3 , wherein the controller is configured to generate the new parity without reading the dataset from the first stripe.

5. The system of claim 1 , wherein the controller is configured to overwrite the dataset with the updated data without reading the dataset from the first stripe.

6. The system of claim 1 , wherein the controller is configured to write the new parity to one of the first stripe and a second stripe that is different from the first stripe.

7. The system of claim 1 , wherein the redundant storage structure comprises one of a RAID 3, a RAID 4, a RAID 5, and a RAID 6 structure.

8. The system of claim 1 , wherein the write-in-place memory device comprises a random access memory (RAM) device comprising one or more of a dynamic RAM (DRAM) device, a static RAM (SRAM) device, a resistive RAM (ReRAM) device, a ferroelectric RAM (FRAM) device, a phase change memory (PCM) device, a magnetoresistive RAM (MRAM) device, a carbon nanotube RAM (CNT-RAM) device, and a programmable metallization cell (PMC) device.

9. The system of claim 1 , wherein the new parity is an XOR parity.

10. The system of claim 1 , wherein:

the dataset is stored across the first stripe in a predetermined quantity of same size data chunks; and

the new parity has the same size as one of the same size data chunks.

11. The system of claim 10 , wherein:

the memory device comprises a predetermined quantity of memory elements, wherein each memory element in the predetermined quantity of memory elements is the same size; and

each memory element stores a respective one of the same size data chunks.

12. The system of claim 11 , wherein:

the dataset comprises 4096 bytes;

the memory device comprises 17 memory elements;

the new parity is stored on one memory element of the 17 memory elements and the first stripe is stored across the remaining 16 memory elements; and

the same size of each of the same size data chunks and of the new parity comprises 256 bytes each.

13. An apparatus, comprising:

means for receiving an updated dataset for a dataset stored across a subset of a first stripe in a redundant array of independent disks (RAID) structure of a random access memory (RAM) device, the subset and one or more additional subsets of the first stripe comprising respective error correction code (ECC) parity;

means for generating a new parity for the updated dataset without reading the dataset from the subset of the first stripe;

means for over-writing the dataset across the subset of the first stripe with the updated dataset; and

means for writing the new parity to the set of stripes.

14. The apparatus of claim 13 , wherein the generating means comprises means for generating the new parity without reading the dataset from the first stripe and without reading a previous parity for the dataset.

15. The apparatus of claim 13 , wherein the over-writing means comprises means for writing the updated dataset across the first stripe without reading the dataset from the first stripe.

16. The apparatus of claim 13 , wherein:

the RAID structure comprises one of a RAID 3, a RAID 4, a RAID 5, and a RAID 6 structure;

the RAM device comprises one of a dynamic RAM (DRAM) device, a static RAM (SRAM) device, a resistive RAM (ReRAM) device, a ferroelectric RAM (FRAM) device, a phase change memory (PCM) device, a magnetoresistive RAM (MRAM) device, a carbon nanotube RAM (CNT-RAM) device, and a programmable metallization cell (PMC) device; and

the new parity is an XOR parity.

17. A method, comprising:

receiving, via a controller, an updated portion of a dataset stored across a first stripe in a redundant array structure of a random access memory device, each portion of a plurality of portions of the dataset comprising respective error correction code (ECC) parity;

generating a new parity for the updated portion of the dataset without reading the portion from the first stripe;

over-writing the portion of the dataset across the first stripe with the updated portion of the dataset; and

writing the new parity to the set of stripes.

18. The method of claim 17 , wherein generating the new parity comprises generating the new parity without reading the dataset from the first stripe.

19. The method of claim 18 , wherein generating the new parity further comprises generating the new parity without reading a previous parity for the dataset.

20. The method of claim 17 , wherein over-writing the dataset comprises writing the updated dataset across the first stripe without reading the dataset from the first stripe.