Integrated circuit package having an IC die between top and bottom leadframes

1. An integrated circuit (IC) package comprising

a first leadframe having a top surface and a bottom surface, said top surface of said first leadframe is covered by mold compound, said mold compound does not extend past said bottom surface of said first leadframe;

an IC die having an active side coupled to said first leadframe bottom surface and having a back side; and

a second leadframe having a top surface and a bottom surface, said back side of said IC die coupled to said top surface of said second leadframe.

2. The IC package of claim 1 , said second leadframe comprising a heat sink, said IC die coupled to said heat sink.

3. The IC package of claim 1 , said first leadframe comprising a plurality of peripheral lead portions, said second leadframe comprising a plurality of peripheral lead portions coupled to said peripheral lead portions of said first leadframe.

4. The IC package of claim 1 , said first leadframe comprising a plurality of inner lead portions, said IC die active side coupled to said first leadframe inner lead portions.

5. The IC package of claim 1 , said second leadframe having a recessed portion, said IC die mounted in said recessed portion.

6. The IC package of claim 1 , at least one passive device mounted on said first leadframe.

7. The IC package of claim 6 , said mold compound covering said at least one passive device and portions of said first leadframe.

8. The IC package of claim 3 , said mold compound covering at least one passive device mounted on said first leadframe and portions of said first leadframe, said mold compound comprising a bottom surface; wherein said plurality of peripheral lead portions of said second leadframe projects laterally outwardly beyond said bottom surface of said mold compound.

9. The IC package of claim 2 , said heat sink comprising a bottom surface and a top surface and having an etched recess formed therein and extending downwardly from said top surface.

10. The IC package of claim 8 , said plurality of peripheral leads of said second leadframe having coplanar bottom surfaces said heat sink bottom surface being flush with said coplanar bottom surfaces.

11. The IC package of claim 8 , said IC die comprising a flip chip.

12. A method of making an integrated circuit (“IC”) package comprising:

providing a leadframe strip having a plurality of leadframes including a first leadframe having inner lead portions and peripheral lead portions;

mounting at least one passive device on the first leadframe;

encapsulating the first leadframe strip including the at least one passive device and portions of the first leadframe in mold compound with at least portions of the first leadframe interior lead portions and at least portions of the first leadframe peripheral lead portions exposed, the mold compound does not extend past the interior lead portions of the first leadframe; and

coupling an active side of an IC die to the interior lead portions of the first leadframe to form a first die-mounted encapsulated leadframe assembly.

13. The method of claim 12 further comprising singulating and removing the first die-mounted encapsulated leadframe assembly from at least one adjacent die-mounted encapsulated leadframe assemblies of the leadframe strip.

14. The method of claim 13 further comprising attaching a second leadframe to the first die-mounted encapsulated leadframe assembly.

15. The method of claim 14 wherein said attaching a second leadframe comprises sandwiching the IC die between the first die-mounted encapsulated leadframe assembly and the second leadframe.

16. The method of claim 15 wherein attaching a second leadframe to the first die-mounted encapsulated leadframe assembly comprises attaching a heat sink portion of the second leadframe to the back side of the IC die and attaching peripheral lead portions of the second leadframe to the peripheral lead portions of the first leadframe.

17. The method of claim 14 wherein attaching a second leadframe to the first die-mounted encapsulated leadframe assembly comprises printing conductive attachment paste on at least the peripheral lead portions of the second leadframe.

18. A method of making an integrated circuit (“IC”) package comprising:

encapsulating a first leadframe and passive devices mounted thereon;

coupling an active surface of an IC die to exposed portions of the encapsulated first leadframe; and

sandwiching the IC die between the first leadframe and a second leadframe.

19. The method of claim 18 wherein said sandwiching comprises engaging a back side of the IC die with a heat sink portion of the second leadframe.