IP Library › Granted Patent US 10,394,487
Granted Patent B2
US 10,394,487 · App. 15/438,890 · Granted Aug 27, 2019

Memory system and operating method thereof

Inventor: Jong-Min Lee (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F3/0656G06F3/061G06F3/0688
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Quick Facts
Patent No.
US 10,394,487
App. No.
15/438,890
Granted
Aug 27, 2019
Kind
B2
Abstract

A memory system may include: a memory device including memory blocks each memory block including pages, each page including memory cells which are coupled to a word line for storing data; and a controller including a memory, the controller receiving a write command and a read command from a host, storing write data corresponding to the write command in the memory, transmitting and storing the write data stored in the memory to and in at least one first memory device buffer coupled to a first memory block in a page of which the write data are to be stored, reading read data corresponding to the read command from a page of a second memory block, storing the read data in at least one second memory device buffer coupled to the second memory block, and storing the read data stored in the second memory device buffer, in the memory.

Claims (36)

1. A memory system comprising:

a memory device including a plurality of memory blocks each memory block including a plurality of pages, each page including a plurality of memory cells which are coupled to a word line for storing data, wherein the plurality of memory blocks individually shares a plurality of memory device buffers, included in the memory device, for storing data related to a write operation or a read operation; and

a controller including a memory, the controller being suitable for receiving a write command and a read command from a host, storing write data corresponding to the write command in the memory, transmitting and storing the write data stored in the memory to and in at least one first memory device buffer operatively coupled to a first memory block in a page of which the write data are to be stored, reading read data corresponding to the read command from a page of a second memory block, storing the read data in at least one second memory device buffer operatively coupled to the second memory block, and storing the read data stored in the second memory device buffer, in the memory, wherein the at least one first memory device buffer and the at least one second memory device buffer are individually selected from the plurality of memory device buffers to be engaged with the first and second memory blocks, and physically isolated from each other.

2. The memory system according to claim 1 , wherein the controller stores the write data in the first memory device buffer, then stops performing the program operation, and performs the read operation in a state in which performing of the program operation is stopped, wherein the write data and the read data are concurrently and individually remained in the at least one first memory device buffer and the read data in the at least one second memory device buffer.

3. The memory system according to claim 2 , wherein the controller completes the read operation by providing the read data stored in the memory, to the host and then after completion of the read operation the controller resumes and completes the program operation.

4. The memory system according to claim 3 , wherein the controller writes and stores the write data which are stored in the first memory device buffer, in pages of the first memory block.

5. The memory system according to claim 1 , wherein the controller receives simultaneously the write command and the read command from the host.

6. The memory system according to claim 1 , wherein the controller receives the read command from the host, after receiving the program command and before completing the program operation.

7. A memory system comprising:

a memory device including a plurality of memory dies, each of the plurality of memory dies including a plurality of planes, each of the plurality of planes including a plurality of memory blocks, wherein the plurality of memory blocks individually shares a plurality of buffers, included in the memory device, for storing data related to a write operation or a read operation; and

a controller including a memory, and suitable for receiving a write command and a read command from a host, storing write data corresponding to the write command, in the memory, transmitting and storing the write data stored in the memory, to and in at least one first buffer of a first memory die for which a program operation corresponding to the write command is to be performed, among the plurality of memory dies, reading read data corresponding to the read command from pages of memory blocks included in the first memory die, storing the read data in at least one second buffer of the first memory die, and storing the read data stored in the second buffer, in the memory, wherein the at least one first buffer and the at least one second buffer are individually selected from the plurality of buffers to be engaged with the first and second memory blocks, and physically isolated from each other.

8. The memory system according to claim 7 , wherein the controller stops performing of the program operation by storing the write data in the first buffer, and performs the read operation corresponding to the read command, in pages of memory blocks included in the first memory die, in a state in which performing of the program operation is stopped, wherein the write data and the read data are concurrently and individually remained in the at least one first buffer and the read data in the at least one second buffer.

9. The memory system according to claim 8 , wherein the controller resumes the program operation with the stopped state, after completing performing of the read operation by providing the read data stored in the memory, to the host.

10. The memory system according to claim 9 , wherein the controller writes and stores, after completing performing of the read operation, the write data stored in the first buffer, in pages of memory blocks included in the first memory die.

11. The memory system according to claim 7 , wherein the controller receives simultaneously the write command and the read command from the host.

12. The memory system according to claim 7 , wherein the controller receives the read command from the host, after storing the write data in the memory and before completing performing of the program operation.

13. A method for operating a memory system, comprising:

receiving a write command and a read command from a host, for a memory device including a plurality of memory dies, each of the plurality of memory dies including a plurality of planes, each of the plurality of planes including a plurality of memory blocks, wherein the plurality of memory blocks individually shares a plurality of buffers, included in the memory device, for storing data related to a write operation or a read operation;

storing write data corresponding to the write command, in a memory included in a controller;

transmitting and storing the write data stored in the memory, to and in at least one first buffer selected from the plurality of buffers;

reading read data corresponding to the read command from pages of memory blocks included in the plurality of memory dies;

storing the read data in at least second buffer selected to be engaged with the pages of memory blocks from the plurality of buffers; and

storing the read data stored in the second buffer, in the memory.

14. The method according to claim 13 , further comprising:

stopping performing of a program operation corresponding to the write command, by storing the write data in the first buffer; and

performing a read operation corresponding to the read command, in a state in which performing of the program operation is buffered,

wherein the write data and the read data are concurrently and individually remained in the at least one first buffer and the read data in the at least one second buffer.

15. The method according to claim 14 , further comprising:

resuming the program operation with the stopped state, after completing performing of the read operation by providing the read data stored in the memory, to the host.

16. The method according to claim 15 , wherein the resuming of the program operation comprises storing, after completing performing of the read operation, the write data stored in the first buffers, in pages of memory blocks included in the plurality of memory dies.

17. The method according to claim 13 , wherein the receiving of the write command and the read command comprises receiving simultaneously the write command and the read command from the host.

18. The method according to claim 13 , wherein the receiving of the write command and the read command comprises receiving the read command from the host, after storing the write data in the memory and before completing performing of the program operation corresponding to the write command.

19. The method according to claim 13 ,

wherein the first buffer is included in a first memory die for which the program operation corresponding to the write command is to be performed, among the plurality of memory dies, and

wherein the second buffer is included in a second memory die for which the read operation corresponding to the read command is to be performed, among the plurality of memory dies.

20. The method according to claim 13 , wherein the first buffer and the second buffer are included in a first memory die for which the program operation corresponding to the write command and the read operation corresponding to the read command are to be respectively performed, among the plurality of memory dies.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2017
From: LEE, JONG-MIN
To: SK HYNIX INC.
Reel/Frame 041773/0985 →
Priority Claims (1)
KR 10-2016-0092415 · Jul 21, 2016 · national
Continuity (1)
Related Publication 20180024770A1 · Jan 25, 2018