IP Library › Granted Patent US 10,396,748
Granted Patent B2
US 10,396,748 · App. 15/730,643 · Granted Aug 27, 2019

Linear, low noise, high Q and widely tunable notch filter

Inventors: Milad Darvishi (Irvine, CA); Hooman Darabi (Laguna Niguel, CA); Arya Reza Behzad (Los Altos, CA)
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
H03H7/01H03H2/008H03H7/12H04J1/045H03H2001/0014H03H2007/013H03H2210/025
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Quick Facts
Patent No.
US 10,396,748
App. No.
15/730,643
Granted
Aug 27, 2019
Kind
B2
Abstract

A linear, low noise, high quality factor (Q) and widely tunable notch filter circuit includes one or more first reactive elements coupled between a first filter node and a first node. The notch filter circuit further includes a multi-branch circuit having multiple parallel branches and coupled between the first node and a second node. Each branch of the multi-branch circuit includes at least a switch coupled to a variable capacitor. A notch frequency of the notch filter circuit is tunable by adjusting a capacitance of the variable capacitor.

Claims (37)

1. A notch filter circuit, the circuit comprising:

one or more first reactive elements coupled between a first filter node and a first node; and

a multi-branch circuit coupled between the first node and a second node,

wherein:

the multi-branch circuit comprise multiple parallel branches,

a branch of the multi-branch circuit comprises at least a switch coupled to a variable capacitor, and

capacitance values of variable capacitors of the multi-branch circuit are configured to be adjusted via multiple consecutive clock pulses to allow tuning a notch frequency of the notch filter circuit.

2. The circuit of claim 1 , wherein the switch is configured to be controllable by a clock signal having a clock frequency.

3. The circuit of claim 2 , the one or more first reactive elements comprise a capacitor, and the notch frequency is lower than the clock frequency.

4. The circuit of claim 2 , wherein the one or more first reactive elements comprise an inductor, and the notch frequency is higher than the clock frequency.

5. The circuit of claim 2 , wherein the one or more first reactive elements comprise a capacitor in series with an inductor, and the notch filter circuit comprises a double notch filter having notches at frequencies lower and higher than the clock frequency.

6. The circuit of claim 1 , wherein the second node comprises a second filter node and is coupled to a ground potential.

7. The circuit of claim 1 , wherein the notch filter circuit comprises a differential notch filter.

8. The circuit of claim 7 , wherein the differential notch filter further comprises one or more second reactive elements coupled between the second node and a second filter node, and the differential notch filter is coupled to a load through an output transformer.

9. The circuit of claim 7 , wherein the branch of the multi-branch circuit comprises four switches coupled to the variable capacitor.

10. The circuit of claim 9 , wherein for each cycle of a differential input signal, two of the four switches are operable to allow a signal current path through the variable capacitor.

11. A method for providing a linear notch filter circuit, the method comprising:

coupling one or more first reactive elements between a first filter node and a first node;

coupling a multi-branch circuit between the first node and a second node, the multi-branch circuit including multiple parallel branches, and a branch of the multi-branch circuit including at least a switch coupled to a variable capacitor; and

adjusting capacitance values of variable capacitors of the multi-branch circuit via multiple consecutive clock pulses to tune a notch frequency of the linear notch filter circuit.

12. The method of claim 11 , further comprising configuring the switch to be controllable by a clock signal having a clock frequency.

13. The method of claim 12 , wherein coupling the one or more first reactive elements comprise coupling a capacitor to allow the notch frequency be lower than the clock frequency.

14. The method of claim 12 , wherein coupling the one or more first reactive elements comprise coupling an inductor to allow the notch frequency be higher than the clock frequency.

15. The method of claim 12 , wherein coupling the one or more first reactive elements comprise coupling a capacitor in series with an inductor to create two notches at frequencies lower and higher than the clock frequency.

16. The method of claim 11 , further comprising coupling the second node as a second filter node to a ground potential.

17. The method of claim 11 , wherein the linear notch filter circuit comprises a differential notch filter, and the method further comprises forming the differential notch filter by coupling one or more second reactive elements between the second node and a second filter node, and coupling the differential notch filter to a load through an output transformer.

18. The method of claim 17 , further comprising forming the branch of the multi-branch circuit by coupling four switches to the variable capacitor, and for each cycle of a differential input signal operating two of the four switches to allow a signal current path through the variable capacitor.

19. A system, comprising:

a power amplifier (PA) driver coupled to a local oscillator generator; and

a notch filter coupled to an output node of the PA driver, the notch filter comprising:

one or more first reactive elements including at least a capacitor or an inductor; and

a multi-branch switched-capacitor circuit including multiple parallel branches coupled between a first node of the notch filter and a second node,

wherein:

the one or more first reactive elements are coupled between the first node of the notch filter and the multi-branch switched-capacitor circuit,

a branch of the multi-branch switched-capacitor circuit includes at least a switch coupled to a variable capacitor, and

capacitance values of variable capacitors of the multi-branch circuit are configured to be adjusted via multiple consecutive clock pulses to tune a notch frequency of the notch filter.

20. The system of claim 19 , wherein the notch filter comprises a differential notch filter, and the branch of the multi-branch switched-capacitor circuit includes four switches coupled to the variable capacitor, and wherein for each cycle of a differential input signal two of the four switches are operable to allow a signal current path through the variable capacitor.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER AND APPLICATION NOS. 13/237,550 AND 16/103,107 FROM THE MERGER PREVIOUSLY RECORDED ON REEL 047231 FRAME 0369. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048549/0113 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047231/0369 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2017
From: DARVISHI, MILAD; DARABI, HOOMAN; BEHZAD, ARYA REZA
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 043907/0879 →
Continuity (1)
Related Publication 20190109575A1 · Apr 11, 2019