IP Library › Granted Patent US 10,397,670
Granted Patent B2
US 10,397,670 · App. 15/425,916 · Granted Aug 27, 2019

Techniques to process packets in a dual-mode switching environment

Inventors: Aaron Gorius (Upton, MA); Myles Wilde (Charlestown, MA); Matthew J. Adiletta (Bolton, MA)
Assignee: Intel Corporation
H04Q11/0005B25J15/0014B65G1/0492G02B6/3882G02B6/3893G02B6/3897G02B6/4292G02B6/4452G05D23/1921G05D23/2039G06F1/183G06F3/061G06F3/064G06F3/067G06F3/0611G06F3/0613G06F3/0616G06F3/0619G06F3/0625G06F3/0631G06F3/0638G06F3/0647G06F3/0653G06F3/0655G06F3/0658G06F3/0659G06F3/0664G06F3/0665G06F3/0673G06F3/0679G06F3/0683G06F3/0688G06F3/0689G06F8/65G06F9/4401G06F9/505G06F9/5016G06F9/5044G06F9/5072G06F9/5077G06F11/141G06F11/3414G06F12/0862G06F12/0893G06F12/10G06F12/109G06F12/1408G06F13/161G06F13/1668G06F13/1694G06F13/409G06F13/4022G06F13/4068G06F13/42G06F13/4282G06F15/8061G06F16/9014G06Q10/06G06Q10/06314G07C5/008G08C17/02G11C5/02G11C5/06G11C7/1072G11C11/56G11C14/0009H03M7/30H03M7/3084H03M7/3086H03M7/40H03M7/4031H03M7/4056H03M7/4081H03M7/6005H03M7/6023H04B10/2504H04L9/0643H04L9/14H04L9/3247H04L9/3263H04L12/2809H04L29/12009H04L41/024H04L41/046H04L41/082H04L41/0813H04L41/0896H04L41/145H04L41/147H04L43/08H04L43/0817H04L43/0876H04L43/0894H04L43/16H04L45/02H04L45/52H04L47/24H04L47/38H04L47/765H04L47/782H04L47/805H04L47/82H04L47/823H04L49/15H04L49/25H04L49/357H04L49/45H04L49/555H04L67/02H04L67/10H04L67/1004H04L67/1008H04L67/1012H04L67/1014H04L67/1029H04L67/1034H04L67/1097H04L67/12H04L67/16H04L67/306H04L67/34H04L69/04H04L69/329H04Q1/04H04Q11/00H04Q11/0003H04Q11/0062H04Q11/0071H04W4/023H05K1/0203H05K1/181H05K5/0204H05K7/1418H05K7/1421H05K7/1422H05K7/1447H05K7/1461H05K7/1487H05K7/1489H05K7/1491H05K7/1492H05K7/1498H05K7/2039H05K7/20709H05K7/20727H05K7/20736H05K7/20745H05K7/20836H05K13/0486G06F2209/5019G06F2209/5022G06F2212/1008G06F2212/1024G06F2212/1041G06F2212/1044G06F2212/152G06F2212/202G06F2212/401G06F2212/402G06F2212/7207G06Q10/087G06Q10/20G06Q50/04G08C2200/00H04B10/25H04L41/12H04L41/5019H04L43/065H04Q2011/0037H04Q2011/0041H04Q2011/0052H04Q2011/0073H04Q2011/0079H04Q2011/0086H04Q2213/13523H04Q2213/13527H04W4/80H05K7/1485H05K2201/066H05K2201/10121H05K2201/10159H05K2201/10189Y02D10/14Y02D10/151Y02P90/30Y10S901/01
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Quick Facts
Patent No.
US 10,397,670
App. No.
15/425,916
Granted
Aug 27, 2019
Kind
B2
Abstract

Various embodiments are generally directed to an apparatus, method and other techniques to receive a packet via an optical fabric, the packet comprising a switch mode indicator, determine a switch mode for the packet based on the switch mode indicator, and process the packet in accordance with a first protocol or a second protocol based on the switch mode.

Claims (48)

1. An apparatus, comprising:

a controller;

memory storing instructions operable on the controller, the instructions, when executed, cause the controller to:

receive a packet via an optical fabric, the packet comprising a switch mode indicator;

determine a switch mode for the packet based on the switch mode indicator;

process the packet in accordance with a first protocol or a second protocol based on the switch mode, wherein the switch mode changes which of the first protocol and the second protocol is used to process the packet; and send the packet to a remote compute device in accordance with the first protocol or the second protocol based on the switch mode.

2. The apparatus of claim 1 , the switch mode comprising an Ethernet switch mode and the controller to process the packet in accordance with the first protocol comprising an Ethernet protocol.

3. The apparatus of claim 1 , the switch mode comprising a low latency switch mode and the controller to process the packet in accordance with the second protocol comprising a low latency protocol.

4. The apparatus of claim 1 , the controller to send the packet to a sled via a first data path comprising one or more Ethernet links when the packet is processed in accordance with the first protocol.

5. The apparatus of claim 1 , the controller to send the packet to a sled via a second data path comprising one or more low latency links when the packet is processed in accordance with the second protocol.

6. The apparatus of claim 1 , the packet comprising the switch mode indicator in a switch mode indicator field, the switch mode indicator including one or more bits to indicate the switch mode for the packet, the controller to determine the switch mode is an Ethernet switch mode or a low latency switch mode based on the one or more bits.

7. The apparatus of claim 1 , comprising a dual-mode optical switch comprising the controller, the memory, and an optical network interface coupled with the optical fabric.

8. The apparatus of claim 1 , wherein to process the packet in accordance with the first protocol or the second protocol based on the switch mode comprises to send the packet to a remote compute device in accordance with the first protocol or the second protocol based on the switch mode.

9. The apparatus of claim 8 , wherein the instructions, when executed, further cause the controller to:

receive a second packet via the optical fabric, wherein the second packet comprises a second switch mode indicator and is immediately following the packet;

determine a second switch mode for the second packet based on the second switch mode indicator; and

send the second packet to a second remote compute device in accordance with the first protocol or the second protocol based on the second switch mode and independent of the switch mode of the packet.

10. A non-transitory computer-readable storage medium, comprising a plurality of instructions, that when executed, enable processing circuitry to:

receive a packet via an optical fabric, the packet comprising a switch mode indicator;

determine a switch mode for the packet based on the switch mode indicator; process the packet in accordance with a first protocol or a second protocol based on the switch mode, wherein the switch mode changes which of the first protocol and the second protocol is used to process the packet; and

send the packet to a remote compute device in accordance with the first protocol or the second protocol based on the switch mode.

11. The non-transitory computer-readable storage medium of claim 10 , the switch mode comprising an Ethernet switch mode and the processing circuitry to process the packet in accordance with the first protocol comprising an Ethernet protocol.

12. The non-transitory computer-readable storage medium of claim 10 , the switch mode comprising a low latency switch mode and the processing circuitry to process the packet in accordance with the second protocol comprising a low latency protocol.

13. The non-transitory computer-readable storage medium of claim 10 , comprising a plurality of instructions, that when executed, enable processing circuitry to send the packet to a sled via a first data path comprising one or more Ethernet links when the packet is processed in accordance with the first protocol.

14. The non-transitory computer-readable storage medium of claim 10 , comprising a plurality of instructions, that when executed, enable processing circuitry to send the packet to a sled via a second data path comprising one or more low latency links when the packet is processed in accordance with the second protocol.

15. The non-transitory computer-readable storage medium of claim 10 , the packet comprising the switch mode indicator in a switch mode indicator field, the switch mode indicator including one or more bits to indicate the switch mode for the packet, the processing circuitry to determine the switch mode is an Ethernet switch mode or a low latency switch mode based on the one or more bits.

16. A computer-implemented method, comprising:

receiving a packet via an optical fabric, the packet comprising a switch mode indicator;

determining a switch mode for the packet based on the switch mode indicator;

processing the packet in accordance with a first protocol or a second protocol based on the switch mode, wherein the switch mode changes which of the first protocol and the second protocol is used to process the packet; and

sending the packet to a remote compute device in accordance with the first protocol or the second protocol based on the switch mode.

17. The computer-implemented method of claim 16 , comprising processing the packet in accordance with the first protocol comprising an Ethernet protocol when the switch mode indicates an Ethernet switch mode.

18. The computer-implemented method of claim 16 , comprising processing the packet in accordance with the second protocol comprising a low latency protocol when the switch mode indicates a low latency switch mode.

19. The computer-implemented method of claim 16 , the packet comprising the switch mode indicator in a switch mode indicator field, the switch mode indicator including one or more bits to indicate the switch mode for the packet.

20. The computer-implemented method of claim 16 , comprising determining the packet is an Ethernet packet based on the switch mode indicator, processing the packet in accordance with the first protocol comprising an Ethernet protocol.

21. The computer-implemented method of claim 16 , comprising determining the packet is a low latency packet based on the switch mode indicator, processing the packet in accordance with the second protocol comprising a low latency protocol.

22. An apparatus, comprising:

interface circuitry;

memory storing instructions operable on the interface circuitry, the instructions, when executed, cause the interface circuitry to:

receive a packet via an optical fabric, the packet comprising a switch mode indicator;

determine a switch mode for the packet based on the switch mode indicator;

process the packet in accordance with a first protocol or a second protocol based on the switch mode, wherein the switch mode changes which of the first protocol and the second protocol is used to process the packet; and

send the packet to a remote compute device in accordance with the first protocol or the second protocol based on the switch mode.

23. The apparatus of claim 22 , the switch mode comprising an Ethernet switch mode and the interface circuitry to process the packet in accordance with the first protocol comprising an Ethernet protocol.

24. The apparatus of claim 22 , the switch mode comprising a low latency switch mode and the interface circuitry to process the packet in accordance with the second protocol comprising a low latency protocol.

25. The apparatus of claim 22 , the interface circuitry to send the packet to a physical resource for processing.

26. The apparatus of claim 22 , the interface circuitry to receive data to send to a sled, determine a switch mode for another packet to send the data, and set another switch mode indicator in the another packet based on the switch mode determined.

27. The apparatus of claim 22 , comprising a controller and physical resources, the interface circuitry coupled with the controller and physical resources and to communicate data for the physical resources via an optical transceiver module.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2017
From: GORIUS, AARON; WILDE, MYLES; ADILETTA, MATTHEW J.
To: INTEL CORPORATION
Reel/Frame 042098/0350 →
Continuity (4)
Provisional Application 62427268 · Nov 29, 2016
Provisional Application 62376859 · Aug 18, 2016
Provisional Application 62365969 · Jul 22, 2016
Related Publication 20180026882A1 · Jan 25, 2018
Cited By (4)
US 12,261,940 US 12,288,101 US 12,506,817 US 12,619,465