Method and apparatus for calculating an average value of an inaccessible current from an accessible current
In a power converter, a circuit determines an average value of an inaccessible current from an average value of an accessible current and a value of the operating duty cycle of the converter. A method of measuring an average value of an inaccessible current from a measured value of a current, in a power converter, by a duty cycle of a pulse width modulation (PWM) signal, representing a duty cycle of the power converter. Coupling a voltage representing the measured value to an input of a low pass filter during a time period (D) and coupling the input of the low pass filter to a reference voltage during a time period (1−D).
1. A power regulator, comprising:
a reference voltage source;
a pulse width modulation (PWM) circuit having an input and an output; and
an analog multiplier circuit having:
a first input coupled to the reference voltage source;
a second input coupled to the output of the PWM circuit; and
a multiplier output; and
a feedback path coupled between the multiplier output and the input of the PWM circuit.
2. The power regulator of claim 1 , wherein the reference voltage source is configured to generate a constant voltage for regulating an input current.
3. The power regulator of claim 1 , wherein the analog multiplier circuit includes:
a low pass filter having a filter input and a filter output coupled to the multiplier output;
a first switch coupled between the first input and the filter input, and having a first control terminal coupled to the second input;
an inverter having an inverter input coupled to the second input and an inverter output; and
a second switch coupled between the filter input and a ground terminal, and having a second control terminal coupled to the inverter output.
4. The power regulator of claim 1 , wherein the analog multiplier circuit is configured to generate a regulated voltage at the multiplier output, and the regulated voltage is representative of a multiplication of a constant voltage from the reference voltage source and a duty cycle of the PWM circuit.
5. The power regulator of claim 1 , wherein the feedback path includes:
an amplifier having:
an amplifier output coupled to the input of the PWM circuit;
a non-inverting input coupled to the multiplier output of the analog multiplier circuit; and
an inverting input coupled to the amplifier output via a capacitor.
6. The power regulator of claim 1 , further comprising:
an input voltage source;
a diode having a cathode coupled to the input voltage source, and an anode;
a current measurement device coupled to the feedback path;
a switch transistor having a first current terminal coupled to the anode of the diode, a second current terminal coupled to the current measurement device, and a gate terminal coupled to the output of the PWM circuit.
7. The power regulator of claim 6 , wherein the current measurement device includes:
a first resistor coupled between the second current terminal of the switch transistor and a ground terminal; and
a second resistor coupled between the second current terminal of the switch transistor and the feedback path.
8. A power regulator, comprising:
a reference voltage source configured to generate a reference voltage;
a pulse width modulation (PWM) circuit configured to generate a PWM signal having a duty cycle;
an analog multiplier circuit coupled to the PWM circuit, and configured to generate a regulated voltage based on the reference voltage and the duty cycle; and
an amplifier coupled to the PWM circuit, and configured to adjust the duty cycle of the PWM signal based on a difference between the regulated voltage and a measured voltage approximating an input current.
9. The power regulator of claim 8 , wherein the analog multiplier circuit includes:
a low pass filter having a filter input and a filter output configured to deliver the regulated voltage;
a first switch coupled between the reference voltage source and the filter input, and having a first control terminal configured to receive the PWM signal; and
a second switch coupled between the filter input and a ground terminal, and having a second control terminal configured to receive an inverted PWM signal inverting the PWM signal.
10. The power regulator of claim 8 , wherein the amplifier includes:
an amplifier output coupled to an input of the PWM circuit;
a non-inverting input coupled to receive the regulated voltage from the analog multiplier circuit; and
an inverting input coupled to the amplifier output via a capacitor.
11. The power regulator of claim 8 , further comprising:
a switch configured to conduct the input current based on the PWM signal; and
a current measurement device configured to generate the measured voltage associated with the input current.
12. The power regulator of claim 11 , wherein the reference voltage includes a constant voltage associated with the measured voltage.
13. The power regulator of claim 11 , further comprising:
an input voltage source;
a diode having a cathode coupled to the input voltage source, and an anode,
wherein:
the current measurement device is coupled to an inverting input of the amplifier;
the switch includes a transistor having a first current terminal coupled to the anode of the diode, a second current terminal coupled to the current measurement device, and a gate terminal configured to receive the PWM signal.
14. The power regulator of claim 13 , wherein the amplifier includes a non-inverting input configured to receive the regulated voltage.
15. The power regulator of claim 13 , wherein the current measurement device includes:
a first resistor coupled between the second current terminal of the transistor and a ground terminal; and
a second resistor coupled between the second current terminal of the transistor and the inverting input of the amplifier.
16. The power regulator of claim 15 , wherein the reference voltage includes a constant voltage for regulating the input current conducting through the first resistor.
17. A power regulator, comprising:
a reference voltage source;
a pulse width modulation (PWM) circuit having an input and an output; and
an analog multiplier circuit having:
a first input coupled to the reference voltage source;
a second input coupled to the output of the PWM circuit; and
a multiplier output; and
an amplifier having:
an amplifier output coupled to the input of the PWM circuit;
a non-inverting input coupled to the multiplier output of the analog multiplier circuit; and
an inverting input coupled to the amplifier output via a capacitor.
18. The power regulator of claim 17 , further comprising:
an input voltage source;
a diode having a cathode coupled to the input voltage source, and an anode;
a current measurement device coupled to the inverting input of the amplifier;
a switch transistor having a first current terminal coupled to the anode of the diode, a second current terminal coupled to the current measurement device, and a gate terminal coupled to the output of the PWM circuit.
19. The power regulator of claim 18 , wherein the current measurement device includes:
a first resistor coupled between the second current terminal of the switch transistor and a ground terminal; and
a second resistor coupled between the second current terminal of the switch transistor and the inverting input of the amplifier.
20. The power regulator of claim 17 , wherein the analog multiplier circuit includes:
a low pass filter having a filter input and a filter output coupled to the multiplier output;
a first switch coupled between the first input and the filter input, and having a first control terminal coupled to the second input;
an inverter having an inverter input coupled to the second input and an inverter output; and
a second switch coupled between the filter input and a ground terminal, and having a second control terminal coupled to the inverter output.