Semiconductor devices and fabrication methods thereof
A method for fabricating a semiconductor structure includes forming a plurality of initial fin structures on a substrate, each including a first region used as a first fin structure, a second region on the first region, and a third region on the second region; forming a first isolation layer on the substrate; removing each third region to form a first opening in the first isolation layer; forming a second isolation layer on sidewall surfaces of each first opening; and removing each second region to form an initial second opening; performing an etching process on the first isolation layer on sidewall surfaces of each initial second opening to form a second opening; forming a second fin structure in each first opening and the second opening; and removing a portion of the first isolation layer and the second isolation layer to expose a portion of sidewall surfaces of each second fin structure.
1. A method for fabricating a semiconductor structure, comprising:
forming a plurality of initial fin structures on a substrate, each initial fin structure including a first region, a second region on the first region, and a third region on the second region;
forming a first isolation layer on the substrate, the first isolation layer exposing top surfaces of the plurality of initial fin structures;
removing each third region to form a first opening in the first isolation layer;
forming a second isolation layer on sidewall surfaces of each first opening;
removing the second region under each first opening to form an initial second opening connecting the first opening, wherein the first region under the initial second opening is used as a first fin structure;
performing an etching process on the first isolation layer on sidewall surfaces of each initial second opening to form a second opening exposing the first isolation layer;
forming a second fin structure in each first opening and the second opening under the first opening; and
removing a top portion of each of the first isolation layer and the second isolation layer to expose a portion of sidewall surfaces of each second fin structure.
2. The method according to claim 1 , wherein:
each second fin structure includes a fourth region formed in the second opening and a fifth region formed in the first opening; and
the fourth region is located on top of the first fin structure, and the fifth region is located on top of the fourth region.
3. The method according to claim 2 , wherein:
the first fin structure has a first width along a direction perpendicular to a length direction of the first fin structure;
the fourth region has a second width along the direction perpendicular to the length direction of the first fin structure; and
the fifth region has a third width along the direction perpendicular to the length direction of the first fin structure, wherein
the second width is larger than the first width; and
the first width is larger than the third width.
4. The method according to claim 1 , wherein forming the second isolation layer on the sidewall surfaces of each first opening includes:
forming a second isolation film on a top surface of the first isolation layer, the second isolation film also covering sidewall and bottom surfaces of each first opening; and
removing a portion of the second isolation film formed on the top surface of the first isolation layer and the bottom surface of each first opening to form the second isolation layer covering the sidewall surfaces of each first opening.
5. The method according to claim 4 , wherein:
the portion of the second isolation film is removed through an anisotropic dry etching process.
6. The method according to claim 1 , wherein forming the second fin structure in each first opening and the second opening under the first opening includes:
forming a semiconductor film to fill the first opening and the second opening.
7. The method according to claim 6 , wherein:
the semiconductor film is formed by an epitaxial growth process.
8. The method according to claim 6 , wherein:
the semiconductor film is made of a material including one or more of SiB, SiGe, SiC, SiP, SiAs, SiGeB, SiCB, GaN, InAs, and InP.
9. The method according to claim 6 , wherein:
the semiconductor film is made of SiC with an atomic concentration of carbon dopants in a range of approximately 0.2% to 4.0%.
10. The method according to claim 1 , further including:
forming a mask structure formed on the third region of each initial fin structure, and removing the mask structure, when removing the third region.
11. The method according to claim 1 , wherein forming the first isolation layer on the substrate includes:
forming a first isolation film on the substrate to cover sidewall and top surfaces of the plurality of initial fin structures;
performing a planarization process on the first isolation film until the top surfaces of the plurality of initial fin structures are exposed.
12. The method according to claim 11 , wherein:
the first isolation layer is made of a material including SiO x or SiON.
13. The method according to claim 1 , wherein:
the second isolation layer is made of a material including SiN x , SiO x or SiON.
14. The method according to claim 1 , wherein:
a thickness of the second isolation layer is in a range of approximately 20 Å to 50 Å.