Semiconductor memory device and method for manufacturing the same

1. A semiconductor memory device comprising:

a substrate;

a plurality of electrodes provided on the substrate, the electrodes being separately stacked and constituting a stacked body, the electrodes having a first width in a first direction along a surface of the substrate, the electrodes including a portion extending in a second direction along the surface, the second direction crossing the first direction;

at least one pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body;

at least one charge storage film provided between the semiconductor layer and the electrodes; and

at least one insulating member having a width in the first direction smaller than the first width of the electrodes, piercing the electrodes, and provided to extend in the stacking direction,

wherein the at least one insulating member includes a first side and a second side that is opposite to the first side, and wherein surfaces of the at least one insulating member on the first side and the second side, respectively, are orthogonal to the second direction,

wherein the at least one pillar structure includes a plurality of pillar structures provided on the first side and the second side of the at least one insulating member,

wherein the at least one insulating member is formed in the stacked body, and

wherein the electrodes of the stacked body are not divided by the at least one insulating member.

2. The device according to claim 1 , wherein the insulating member includes silicon oxide.

3. The device according to claim 1 , wherein the insulating member includes silicon nitride.

4. The device according to claim 1 , wherein the insulating member pierces the stacked body.

5. The device according to claim 1 , wherein a shape of the insulating member is a rectangular parallelepiped.

6. The device according to claim 1 , wherein

the insulating member includes a plurality of insulating members provided along the second direction, and

the pillar structure includes a plurality of pillar structures disposed between the insulating members adjacent in the second direction.

7. The device according to claim 1 , wherein

the pillar structure includes a plurality of pillar structures disposed in a plurality of rows, and

the insulating member divides each of the rows.

8. The device according to claim 1 , wherein

the electrodes are disposed in a first region, and

the insulating member is not disposed at both end portions of the first region in the first direction.

9. The device according to claim 8 , wherein the pillar structure is not disposed in the first region.

10. The device according to claim 1 , further comprising:

an enclosing portion covering a side surface of the insulating member,

wherein the enclosing portion includes at least one of a material of the semiconductor layer and a material of the charge storage film.

11. The device according to claim 1 , wherein the plurality of electrodes includes tungsten or molybdenum.

12. A semiconductor memory device comprising:

a substrate;

a plurality of electrodes provided on the substrate, the electrodes being separately stacked and constituting a stacked body, the electrodes having a first width in a first direction along a surface of the substrate, the electrodes including a portion extending in a second direction along the surface, the second direction crossing the first direction;

at least one pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body;

at least one charge storage film provided between the semiconductor layer and the electrodes; and

at least one gap being formed in the stacked body so as to pierce the electrodes,

wherein a width of the gap in the first direction is smaller than the first width of the electrodes,

wherein the at least one gap includes a first side and a second side that is opposite to the first side, and wherein surfaces of the at least one gap on the first side and the second side, respectively, are orthogonal to the second direction,

wherein the at least one pillar structure includes a plurality of pillar structures provided on the first side and the second side of the at least one gap, and

wherein the electrodes of the stacked body are not divided by the at least one gap.

13. The device according to claim 1 , further comprising a plurality of embedded members provided in a plane along the second direction and the stacking direction, and that divide the stacked body into a plurality of partitions in the first direction,

wherein the at least one insulating member is disposed between the plurality of the embedded members in the first direction.

14. The device according to claim 13 , wherein the at least one insulating member is arranged with the electrodes in the first direction between the plurality of the embedded members.

15. The device according to claim 1 , wherein the at least one insulating member has the width in the first direction larger than an outer diameter of the at least one pillar structure.

16. The device according to claim 12 , further comprising a plurality of embedded members provided in a plane along the second direction and the stacking direction, and that divide the stacked body into a plurality of partitions in the first direction,

wherein the at least one gap is disposed between the plurality of embedded members in the first direction.

17. The device according to claim 16 , wherein the at least one gap is arranged with the electrodes in the first direction between the plurality of the embedded members.

18. A semiconductor memory device comprising:

a substrate;

a plurality of electrodes provided parallel to a first direction and a second direction parallel to a surface of the substrate, the electrodes being separately stacked and constituting a stacked body;

at least one pillar structure provided in the stacked body and including a semiconductor layer extending in a stacking direction of the stacked body;

at least one charge storage film provided between the semiconductor layer and the electrodes;

a plurality of embedded members provided in a plane along the second direction and the stacking direction, and that divide the stacked body into a plurality of partitions in the first direction; and

at least one insulating member extending in the stacking direction through the stacked body,

wherein the at least one insulating member includes a first side and a second side that is opposite to the first side, and wherein surfaces of the at least one insulating member on the first side and the second side, respectively, are orthogonal to the second direction,

wherein the at least one pillar structure includes a plurality of pillar structures provided on the first side and the second side of the at least one insulating member, and

wherein the at least one insulating member is formed such that the electrodes of the stacked body are not divided by the at least one insulating member in the first direction and the electrodes include a portion extending in the second direction between the plurality of the embedded members.

19. The device according to claim 18 , wherein the at least one insulating member has a width in the first direction larger than an outer diameter of the at least one pillar structure.