Method for producing pillar-shaped semiconductor device
A method for producing a pillar-shaped semiconductor device includes forming, above a NiSi layer serving as a lower wiring conductor layer and connecting to an N + layer of an SGT formed within a Si pillar, a first conductor W layer that extends through a NiSi layer serving as an upper wiring conductor layer and connecting to a gate TiN layer and that extends through a NiSi layer serving as an intermediate wiring conductor layer and connecting to an N + layer; forming an insulating SiO 2 layer between the NiSi layer and the W layer; and forming a second conductor W layer so as to surround the W layer and have its bottom at the upper surface layer of the NiSi layer, to achieve connection between the NiSi layer and the NiSi layer.
1. A method for producing a pillar-shaped semiconductor device, the method comprising:
a step of providing a stack structure including a semiconductor structure including at least one semiconductor pillar formed on a substrate so as to be perpendicular to a surface of the substrate, a gate insulating layer formed so as to surround an outer periphery of the at least one semiconductor pillar, a gate conductor layer formed so as to surround the gate insulating layer, a first impurity region connected to the at least one semiconductor pillar, and a second impurity region connected to the at least one semiconductor pillar so as to be separated from the first impurity region, and
a first wiring conductor layer, a second wiring conductor layer, and a third wiring conductor layer that individually connect to any one of the gate conductor layer, the first impurity region, and the second impurity region of the semiconductor structure, that extend in a horizontal direction along the surface of the substrate, that at least partially overlap in plan view, and that are present in this order from a lower level to a higher level;
a step of forming a first contact region that extends through the third wiring conductor layer and the second wiring conductor layer to an upper surface or inside of the first wiring conductor layer;
a step of forming a first tubular insulating layer in a portion that is on a side surface of the first contact region and is on a side surface of the second wiring conductor layer;
a step of filling the first contact region to form a first conductor layer;
a step of exposing a top portion of the first conductor layer and subsequently forming a first material layer so as to surround the top portion of the first conductor layer;
a step of forming a first insulating layer over an entirety of the stack structure, and subsequently planarizing upper surfaces of the first conductor layer, the first material layer, and the first insulating layer so as to expose upper surfaces of the first conductor layer and the first material layer;
a step of removing the first material layer;
a step of forming a second contact region, through the first insulating layer serving as a mask, so as to extend to an upper surface of the third wiring conductor layer; and
a step of filling the second contact region to form a second conductor layer.
2. The method for producing a pillar-shaped semiconductor device according to claim 1 , further comprising a step of adjusting the first conductor layer and the second conductor layer such that a level of a surface of a top portion of the first conductor layer matches with a level of a surface of a top portion of the second conductor layer.
3. The method for producing a pillar-shaped semiconductor device according to claim 1 , wherein the step of forming the second conductor layer includes filling a conductor material into the second contact region and depositing the conductor material on the first insulating layer, and subsequently subjecting the conductor material to a lithographic process and etching to form a single layer that includes the second conductor layer and a wiring conductor layer connecting to upper surfaces of the first conductor layer and the second conductor layer.
4. The method for producing a pillar-shaped semiconductor device according to claim 1 , further comprising:
a step of forming at least one third contact region that is formed, in plan view, in a position other than in the first contact region, that extends downward beyond a surface of the first insulating layer, and that connects to any one of the gate conductor layer, the first impurity region, and the second impurity region;
a step of filling the at least one third contact region to form a third conductor layer formed of a conductor material that is the same as in the first conductor layer; and
a step of adjusting the first conductor layer and the third conductor layer such that a level of a surface of a top portion of the first conductor layer matches with a level of a surface of a top portion of the third conductor layer.
5. The method for producing a pillar-shaped semiconductor device according to claim 1 , wherein the first wiring conductor layer, the second wiring conductor layer, and the third wiring conductor layer are each formed of metal or alloy or a semiconductor material layer containing acceptor or donor impurity.
6. The method for producing a pillar-shaped semiconductor device according to claim 1 , wherein at least any one of the first wiring conductor layer, the second wiring conductor layer, and the third wiring conductor layer has a single-crystal semiconductor layer that connects to the side surface of the at least one semiconductor pillar and that contains acceptor or donor impurity.
7. The method for producing a pillar-shaped semiconductor device according to claim 1 , wherein, in plan view, a portion of an outer periphery of the first contact hole region overlaps at least any one of the first wiring conductor layer, the second wiring conductor layer, and the third wiring conductor layer.