IP Library › Granted Patent US 10,418,911
Granted Patent B2
US 10,418,911 · App. 16/115,426 · Granted Sep 17, 2019

Adaptive synchronous rectifier sensing deglitch

Inventors: Pengju Kong (Campbell, CA); Tao Li (Campbell, CA); Hien Bui (Campbell, CA); Wenbo Liang (Campbell, CA); Hanguang Zhang (Campbell, CA)
Assignee: DIALOG SEMICONDUCTOR INC.
H02M3/33592H02M1/08H03K5/1252Y02B70/1475
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Quick Facts
Patent No.
US 10,418,911
App. No.
16/115,426
Granted
Sep 17, 2019
Kind
B2
Abstract

A synchronous rectifier controller for controlling the on and off periods of a synchronous rectifier switch transistor in a switching power converter. In particular, the synchronous rectifier controller is configured to adaptively enable and disable a deglitch filter for filtering a turn-on signal for the synchronous rectifier switch transistor. In this fashion, the synchronous rectifier switch transistor may be switched on more rapidly during periods when the deglitch filter is disabled for greater efficiency yet the switching power converter is protected by the deglitch filter when it is not disabled.

Claims (12)

1. A synchronous rectifier (SR) controller for controlling an SR switch on a secondary side of a flyback converter, comprising:

a deglitch filter for filtering an SR switch signal to produce a filtered version of the SR switch signal; and

a deglitch control circuit configured to switch on the SR switch responsive to the SR switch signal during a first part of a power switch cycle and to switch on the SR switch responsive to the filtered version of the SR switch signal during a second part of the power switch cycle.

2. The SR controller of claim 1 , wherein the deglitch control circuit is further configured to deactivate the deglitch filter during the first part of the power switch cycle.

3. The SR controller of claim 1 , wherein the deglitch control circuit is further configured to integrate a difference between a voltage across the SR switch and an output voltage for the flyback converter to determine the first part of the power switch cycle and the second part of the power switch cycle.

4. The SR controller of claim 3 , wherein the deglitch control circuit is further configured to integrate the difference through an integration of a difference between the voltage across the SR switch and twice the output voltage.

5. The SR controller of claim 1 , further comprising:

a comparator configured to compare a voltage across the SR switch to a threshold voltage to generate the SR switch signal.

6. The SR controller of claim 1 , further comprising:

a comparator configured to compare the filtered version of the SR switch signal to a threshold to generate a comparator output signal, wherein the deglitch control circuit is further configured to switch on the SR switch during the second part of the power switch cycle responsive to the comparator output signal.

7. The SR controller of claim 1 , wherein the SR switch signal comprises a voltage across the SR switch.

8. The SR controller of claim 7 , wherein the voltage across the SR switch is a drain-to-source voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2018
From: KONG, PENGJU; LI, TAO; BUI, HIEN; LIANG, WENBO; ZHANG, HANGUANG
To: DIALOG SEMICONDUCTOR INC.
Reel/Frame 046731/0327 →
Continuity (2)
Continuation 15640315 · Jun 30, 2017
Related Publication 20190006950A1 · Jan 3, 2019