Soft bit computation unit for MIMO detection and error correction

1. A method for computing soft bits at a wireless Multiple Input Multiple Output (MIMO) receiver system, comprising:

receiving a signal at a plurality of receive antennas of the MIMO receiver system;

performing, at a MIMO detector, a first decoding operation on the signal using a channel estimate information and a decoding tree to produce output data for a bit estimation value comprising a maximum likelihood solution along with a naturally ordered vector identifying all explored node metrics and node indices; and

generating, at a soft bit computation engine, soft bit values for each bit estimation value by:

determining a set of bit-masks through repetition and indexing operations applied on the explored node indices;

masking the naturally ordered vector with the set of bit-masks to generate masked node metrics;

determining candidate soft bit values by subtracting metrics of all nodes that form the maximum likelihood solution from the masked node metrics; and

determining a final soft bit value by identifying which of the candidate soft bit values has a lowest value.

2. The method of claim 1 , where performing the first decoding operation comprises performing non-linear hard-output MIMO decoding on the signal.

3. The method of claim 1 , where the output data comprises a metric vector λ ML representing a most likely decoding tree path, a naturally ordered vector e of all explored node metrics in the decoding tree, and an index vector idx of indices in a signal constellation vector of retained nodes at each stage.

4. The method of claim 3 , where determining the set of bit-masks comprises computing bit masks to identify node error metrics of the naturally ordered vector e having an opposite bit decision to the hard decision bits.

5. The method of claim 4 , where masking the naturally ordered vector comprises masking the naturally ordered vector e with the bit masks to generate a first masked vector.

6. The method of claim 5 , where determining candidate soft bit values comprises subtracting the metric vector λ ML from the first masked vector to generate soft bit candidate values.

7. The method of claim 6 , where determining the final soft bit values comprises performing an unsigned minima search over the soft bit candidate values.

8. A Multiple Input Multiple Output (MIMO) detector, comprising:

a plurality of receive antennas for receiving a signal;

a hard-output unit which performs a first decoding operation on the signal using channel estimate information and a decoding tree to produce output data for a bit estimation value comprising a maximum likelihood solution along with a naturally ordered vector identifying all explored node metrics and node indices; and

a soft-output unit comprising a mask computation unit for generating a set of bit-masks and a log-likelihood ratio (LLR) computation unit for generating soft bit values for each bit estimation value by:

determining the set of bit-masks through repetition and indexing operations applied on the explored node indices;

masking the naturally ordered vector with the set of bit-masks to generate masked node metrics;

determining candidate soft bit values by subtracting metrics of all nodes that form the maximum likelihood solution from the masked node metrics; and

determining a final soft bit value by identifying which of the candidate soft bit values has a lowest value.

9. The MIMO detector of claim 8 , where soft-output unit comprises, for each soft bit of each layer in the decoding tree, a dedicated hardware mask computation unit and a dedicated hardware LLR computation unit.

10. The MIMO detector of claim 8 , where soft-output unit comprises a fixed number of dedicated hardware mask computation units and dedicated hardware LLR computation units that are scheduled in a round-robin fashion to compute each soft bit of each layer in the decoding tree.

11. The MIMO detector of claim 8 , where soft-output unit comprises a software-implemented LLR computation unit and a fixed number of dedicated hardware mask computation units that are scheduled in a round-robin fashion to compute each soft bit of each layer in the decoding tree.

12. The MIMO detector of claim 8 , where soft-output unit comprises a software-implemented mask computation unit and a fixed number of dedicated hardware LLR computation units that are scheduled in a round-robin fashion to compute each soft bit of each layer in the decoding tree.

13. The MIMO detector of claim 8 , where the hard-output unit comprises a non-linear hard-output MIMO decoder which produces output data comprising a metric vector λ ML representing a most likely decoding tree path, a naturally ordered vector e of all explored node metrics in the decoding tree, and an index vector idx of indices in a signal constellation vector of retained nodes at each stage.

14. The MIMO detector method of claim 13 , where determining the set of bit-masks comprises computing bit masks to identify node error metrics of the naturally ordered vector e having an opposite bit decision to the hard decision bits.

15. The MIMO detector method of claim 14 , where masking the naturally ordered vector comprises masking the naturally ordered vector e with the bit masks to generate a first masked vector.

16. The MIMO detector method of claim 15 , where determining candidate soft bit values comprises subtracting the metric vector λ ML from the first masked vector to generate soft bit candidate values.

17. The MIMO detector method of claim 16 , where determining the final soft bit values comprises performing an unsigned minima search over the soft bit candidate values.

18. A soft-bit computation unit for generating soft bit values for each bit estimation value, comprising:

a mask computation unit for determining a set of bit-masks through repetition and indexing operations applied on explored node indices identified in a naturally ordered vector generated by a non-linear hard-output MIMO decoder; and

a log-likelihood ratio (LLR) computation unit for generating soft bit values for each bit estimation value by masking the naturally ordered vector with the set of bit-masks to generate masked node metrics, determining candidate soft bit values by subtracting metrics of all nodes that form the maximum likelihood solution from the masked node metrics, and determining a final soft bit value by identifying which of the candidate soft bit values has a lowest value.

19. The soft-bit computation unit of claim 18 , where the mask computation unit comprises:

a repetition unit for generating bit masks p i (j) that satisfy i=j; and

an indexing and repetition unit for generating bit masks p i (j) that satisfy i<j.

20. The soft-bit computation unit of claim 18 , where the LLR computation unit comprises:

a multiplication block connected to mask the naturally ordered vector with the set of bit-masks, thereby generating masked results;

an arithmetic subtraction block connected to subtract from the masked results an output vector (λ ML ) of metrics of all nodes that form a Maximum Likelihood path, thereby generating subtraction results; and

an extrema search block connected to perform an unsigned extrema search over aggregated subtraction results, thereby calculating soft bit log-likelihood ratio (LLR) values for input to an error correction code (ECC) decoder.