IP Library Granted Patent US 10,438,679
Granted Patent B2
US 10,438,679 · App. 15/554,751 · Granted Oct 8, 2019

Memory diagnosis apparatus and memory diagnosis program

Inventors: Ryoya Ichioka (Tokyo, JP); Ryoichi Sasaki (Tokyo, JP); Takahiro Akimoto (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
G11C29/38G06F12/16G11C29/06G11C29/16G11C29/36G11C2029/4402
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Quick Facts
Patent No.
US 10,438,679
App. No.
15/554,751
Granted
Oct 8, 2019
Kind
B2
Abstract

A memory diagnosis apparatus to diagnose whether a fault occurs in a memory includes a diagnosis execution unit to divide the memory into a plurality of areas, select two or more base areas that are diagnostic targets from among the areas to carry out a memory diagnosis including a reading test and a writing test, and perform only the writing test in carrying out the memory diagnosis on a same base area for second or more times. The diagnosis execution unit is implemented by an arithmetic device that is a processing circuit that executes a memory diagnosis program stored in a storage device.

Claims (26)

1. A memory diagnosis apparatus to diagnose whether a fault occurs in a memory, the memory diagnosis apparatus comprising:

a processor configured to:

divide the memory into a plurality of areas,

select two or more base areas as diagnostic targets from among the areas to perform a memory diagnosis that includes a reading test and a writing test,

determine whether the memory diagnosis that includes the reading test and the writing test has been carried out on each of the selected base areas, and

perform a memory diagnosis that includes: (i) for each of the selected base areas that the reading test and the writing test have not been previously performed on, performing the memory diagnosis that includes the reading test and the writing test on the selected base area, and (ii) for each of the selected base areas that the reading test and the writing test has been previously performed on, performing only the writing test without performing the reading test.

2. The memory diagnosis apparatus according to claim 1 , wherein the processor is further configured to:

receive a notification that the memory diagnosis on the base areas has been completed,

manage whether a memory diagnosis has been carried out on each of the areas into which the memory is divided,

reply regarding whether a memory diagnosis has been already carried out on an area inquired about,

select base areas that are areas on which the memory diagnosis is to be carried out, and

inform of the selected base areas.

3. A non-transitory computer-readable medium storing a memory diagnosis program that, when executed by a programmable logic controller, causes the programmable logic controller to perform a process of diagnosing whether a fault occurs in a memory, wherein the memory diagnosis program causes the programmable logic controller to:

divide the memory into a plurality of areas,

select two or more base areas as diagnostic targets from among the areas to perform a memory diagnosis that includes a reading test and a writing test,

determine whether the memory diagnosis that includes the reading test and the writing test has been carried out on each of the selected base areas, and

perform a memory diagnosis that includes: (i) for each of the selected base areas that the reading test and the writing test have not been previously performed on, performing the memory diagnosis that includes the reading test and the writing test on the selected base area, and (ii) for each of the selected base areas that the reading test and the writing test have been previously performed on, performing only the writing test without performing the reading test.

4. The memory diagnosis program non-transitory computer-readable medium according to claim 3 , wherein the memory diagnosis program causes the programmable logic controller to:

receive a notification that the memory diagnosis on the base areas has been completed,

manage whether a memory diagnosis has been carried out on each of the areas into which the memory is divided,

reply regarding whether a memory diagnosis has been already carried out on an area inquired about,

select base areas that are areas on which the memory diagnosis is to be carried out, and

inform of the selected base areas.

5. The memory diagnosis apparatus according to claim 1 , wherein the memory diagnosis that includes the reading test and the writing test is a memory diagnosis that detects a memory fault by performing the reading test and the writing test on a cell of the memory, and determines whether the test results match the expected values.

6. The memory diagnosis apparatus according to claim 5 , wherein the memory diagnosis that includes the reading test and the writing test is one of an “Abraham” memory diagnosis or a “March” memory diagnosis.

7. The memory diagnosis apparatus according to claim 1 , wherein the memory diagnosis that includes the reading test and the writing test uses an algorithm that processes different combinations of cells in different orders, in accordance with a diagnostic processing time and a diagnostic rate, to execute a process of writing and reading a value to and from a cell of the memory, and confirming whether the read value matches the written value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2017
From: ICHIOKA, RYOYA; SASAKI, RYOICHI; AKIMOTO, TAKAHIRO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 044339/0274 →
Continuity (1)
Related Publication 20180240532A1 · Aug 23, 2018