IP Library Granted Patent US 10,438,985
Granted Patent B2
US 10,438,985 · App. 15/482,580 · Granted Oct 8, 2019

Semiconductor device, manufacturing method thereof, and electronic apparatus

Inventors: Hiroshi Takahashi (Kanagawa, JP); Taku Umebayashi (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14636H01L21/76898H01L23/481H01L24/05H01L27/1464H01L27/1469H01L27/14632H01L27/14634H01L27/14645H01L27/14687H01L31/0203H01L31/02005H01L31/02325H01L31/18H01L21/76251H01L2224/02166H01L2224/04042H01L2224/45124H01L2224/45147H01L2224/48463H01L2924/00011H01L2924/00014H01L2924/01015H01L2924/01047H01L2924/10253H01L2924/12043H01L2924/13091H01L2924/14H01L2924/3025
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Quick Facts
Patent No.
US 10,438,985
App. No.
15/482,580
Granted
Oct 8, 2019
Kind
B2
Abstract

A semiconductor device having a first semiconductor section including a first wiring layer at one side thereof; a second semiconductor section including a second wiring layer at one side thereof, the first and second semiconductor sections being secured together with the respective first and second wiring layer sides of the first and second semiconductor sections facing each other; a conductive material extending through the first semiconductor section to the second wiring layer of the second semiconductor section and by means of which the first and second wiring layers are in electrical communication; and an opening, other than the opening for the conductive material, which extends through the first semiconductor section to the second wiring layer.

Claims (27)

1. An imaging device comprising:

a first semiconductor section including first wiring layers at one side thereof, the first semiconductor section further including a pixel region, the pixel region including a plurality of pixels arranged in a two-dimensional array, and a pixel of the plurality of pixels including a photodiode and at least one transistor;

a second semiconductor section including second wiring layers at one side thereof, the first and second semiconductor sections being secured together with a bonding layer between the first and second wiring layers of the first and second semiconductor sections such that the first and second semiconductor sections face each other;

a conductor extending through the first semiconductor section and the bonding layer to the second semiconductor section, the conductor electrically connecting a portion of the first wiring layers and a portion of the second wiring layers;

a first film disposed above the conductor, the first film corresponding to the conductor;

a second film disposed above the first film, wherein a first edge of the first film and a second edge of the first film are covered by the second film in a cross-sectional view,

wherein the first edge of the first film is disposed between a first edge of the conductor and a first edge of a first insulating spacer layer, and the second edge of the first film is disposed between a second edge of the conductor and a second edge of a second insulating spacer layer in the cross-sectional view.

2. The imaging device according to claim 1 , wherein the first film is formed to cover an upper surface of the conductor in the cross-sectional view.

3. The imaging device according to claim 1 , wherein the first film includes SiN or SiCN.

4. The imaging device according to claim 1 , wherein the first film has a thickness of 10 to 150 nm.

5. The imaging device according to claim 1 , wherein the second film includes SiO2, SiO, SiN, SiON, P—SiO, HDP or an organic film.

6. The imaging device according to claim 1 , wherein the conductor is disposed in a peripheral region which is arranged around the pixel region.

7. The imaging device according to claim 6 , wherein the first film is disposed in the peripheral region.

8. The imaging device according to claim 7 , wherein the second film is disposed above the pixel region and in the peripheral region.

9. The imaging device according to claim 1 , wherein the conductor includes a first portion of the conductor and a second portion of the conductor.

10. The imaging device according to claim 9 , wherein the first portion of the conductor and the second portion of the conductor are connected through a third portion of the conductor.

11. The imaging device according to claim 1 , wherein a third film is disposed above the first semiconductor section and both sides of the conductor in the cross-sectional view.

12. The imaging device according to claim 11 , wherein the third film includes TaO2 or HfO2.

13. The imaging device according to claim 11 , wherein the third film is disposed above the second film.

14. The imaging device according to claim 1 , wherein the conductor includes metal.

15. The imaging device according to claim 14 , wherein the conductor is tapered.

16. The imaging device according to claim 1 , wherein the first wiring layer includes copper (Cu).

17. The imaging device according to claim 1 , wherein the second wiring layer includes copper (Cu) or aluminum (Al).

18. The imaging device according to claim 1 , wherein the conductor includes a plurality of conductors, wherein the first film is respectively disposed above the plurality of conductors, and wherein the first film caps the plurality of conductors in the cross-sectional view.

19. The imaging device according to claim 1 , wherein an on-chip lens and an on-chip color filter are disposed above the pixel.

20. The imaging device according to claim 1 , wherein an insulating film is disposed at an outer wall surface of the conductor.

21. The imaging device according to claim 1 , wherein the first insulating spacer layer and the second insulating spacer layer are disposed in the first semiconductor section.

Priority Claims (1)
JP 2009-249327 · Oct 29, 2009 · national
Continuity (6)
Continuation 15482561 · Apr 7, 2017
Continuation 15230281 · Aug 5, 2016
Continuation 15211985 · Jul 15, 2016
Continuation 14451809 · Aug 5, 2014
Continuation 12910014 · Oct 22, 2010
Related Publication 20170213920A1 · Jul 27, 2017
Cited By (2)
US 12,302,651 US 12,349,481