IP Library Granted Patent US 10,446,402
Granted Patent B2
US 10,446,402 · App. 15/697,905 · Granted Oct 15, 2019

Semiconductor device

Inventor: Jie Zhao (Shanghai, CN)
Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
H01L21/28229H01L21/28088H01L21/82345H01L27/088H01L29/513
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Quick Facts
Patent No.
US 10,446,402
App. No.
15/697,905
Granted
Oct 15, 2019
Kind
B2
Abstract

The present disclosure provides semiconductor devices and fabrication methods thereof. A work function layer is formed on the semiconductor substrate. A buffer layer is formed on the work function layer. The work function layer is doped through the buffer layer with impurity ions. The buffer layer obstructs a flow of the impurity ions to control a concentration of the impurity ions in different regions of the work function layer to regulate a work function of the work function layer in the different regions.

Claims (36)

1. A semiconductor device, comprising:

a semiconductor substrate including: a first region including a first gate electrode trench therein for forming a first transistor, a second region including a second gate electrode trench therein for forming a second transistor, and a third region including a third gate electrode trench therein for forming a third transistor, wherein the first region is between the second region and the third region;

a work function layer covering sidewalls and bottom of each of the first, second, and third gate electrode trenches on the semiconductor substrate, wherein the work function layer has a single layer structure;

a buffer layer on the work function layer,

first ions and second ions in the work function layer on the second region, wherein the first ions and the second ions are different type ions; and

second ions in the work function layer on the first region, wherein the work function on the first region has no first ions.

2. The device of claim 1 , wherein:

the work function layer covers sidewalls and bottom of the third gate electrode trench without being doped.

3. The device of claim 1 , wherein:

the buffer layer is made of a material selected from a group of titanium nitride, tantalum carbide, tantalum, tantalum nitride, and tantalum aluminum compound.

4. The device of claim 1 , wherein:

the first ions and the second ions are same type ions.

5. The device of claim 1 , wherein:

the first and the second ions are one or more of boron ions, silicon ions and fluoride ions.

6. The device of claim 1 , wherein:

the first and the second ions have a dose ranging approximately from 1.0×10 14 to 1.0×10 19 atom/cm 2 .

7. The device of claim 1 , wherein:

the first transistor and the second transistor are NMOS transistors.

8. The device of claim 1 , wherein:

the buffer layer has a thickness ranging approximately from 5 Å to 100 Å.

9. The device of claim 1 , wherein:

the work function layer is made of a material selected from a group of tantalum carbide, titanium, aluminum, and titanium aluminum compound.

10. The device of claim 1 , wherein:

the work function layer is doped through the buffer layer with impurity ions, and

the buffer layer obstructs a flow of impurity ions including the first and second ions to control a concentration of the impurity ions in different regions of the work function layer to regulate a work function of the work function layer in the first and second regions.

11. The device of claim 1 , wherein:

the work function layer is configured to adjust a threshold voltage of the first transistor and a threshold voltage of the second transistor.

12. The device of claim 11 , wherein:

the threshold voltage of the second transistor is higher than the threshold voltage of the first transistor.

13. The device of claim 11 , wherein:

the threshold voltage of the second transistor is higher than the threshold voltage of the first transistor and the threshold voltage of the first transistor is higher than a threshold of the third transistor.

14. The device of claim 1 , wherein:

the work function layer has a uniform thickness on the sidewalls and the bottom of each of the first and second gate electrode trenches on the semiconductor substrate; and

the buffer layer has a uniform thickness on the work function layer.

15. The device of claim 1 , wherein:

an amount of the second ions in the work function layer is adjusted by a thickness of the buffer layer.

Priority Claims (1)
CN 2015 1 0012074 · Jan 9, 2015 · national
Continuity (2)
Division 14992448 · Jan 11, 2016
Related Publication 20170365479A1 · Dec 21, 2017