Semiconductor device package with a conductive post
A semiconductor package includes: (1) a substrate; (2) a first isolation layer disposed on the substrate, the first isolation layer including an opening; (3) a pad disposed on the substrate and exposed from the opening; (4) an interconnection layer disposed on the pad; and (5) a conductive post including a bottom surface, the bottom surface having a first part disposed on the interconnection layer and a plurality of second parts disposed on the first isolation layer.
1. A semiconductor package, comprising:
a substrate;
a first isolation layer disposed on the substrate, the first isolation layer including an opening;
a pad disposed on the substrate and exposed from the opening;
an interconnection layer disposed on the pad; and
a pre-formed conductive post including a bottom surface, the bottom surface having a first part disposed on the interconnection layer and a second part disposed on and in contact with the first isolation layer.
2. The semiconductor package of claim 1 , wherein the first part contacts the interconnection layer and the second part contacts the first isolation layer.
3. The semiconductor package of claim 1 , wherein an area of the first part of the bottom surface of the pre-formed conductive post is substantially the same as, or larger than, a total area of the second part of the bottom surface of the pre-formed conductive post.
4. The semiconductor package of claim 1 , wherein a top surface of a portion of the interconnection layer is exposed from the pre-formed conductive post.
5. The semiconductor package of claim 4 , wherein the portion of the interconnection layer is in contact with the first isolation layer.
6. The semiconductor package of claim 5 , further comprising a second isolation layer encapsulating the pre-formed conductive post.
7. The semiconductor package of claim 6 , wherein the second isolation layer is in contact with the top surface of the interconnection layer.
8. The semiconductor package of claim 6 , wherein the second isolation layer is spaced apart from the pad by the interconnection layer.
9. The semiconductor package of claim 6 , wherein the second isolation layer is disposed on the pad and encapsulates the interconnection layer.
10. The semiconductor package of claim 9 , wherein the interconnection layer is spaced apart from the first isolation layer by the second isolation layer.
11. The semiconductor package of claim 1 , wherein the pad is spaced apart from the first isolation layer by the interconnection layer.
12. The semiconductor package of claim 1 , wherein the interconnection layer has a substantially rectangular shape.
13. The semiconductor package of claim 1 , wherein the interconnection layer has a substantially circular shape.
14. A semiconductor package, comprising:
a substrate;
a first isolation layer disposed on the substrate, the first isolation layer including an opening;
a pad disposed on the substrate and exposed from the opening;
an interconnection layer disposed on pad;
a second isolation layer disposed on and in contact with the pad and encapsulating the interconnection layer; and
a conductive post disposed on the interconnection layer and on the second isolation layer.
15. The semiconductor package of claim 14 , wherein the conductive post has a bottom surface including a first part and a second part, and the first part contacts a top surface of the interconnection layer and the second part contacts the first isolation layer.
16. The semiconductor package of claim 14 , wherein the second isolation layer encapsulates the first isolation layer and the conductive post.
17. The semiconductor package of claim 14 , wherein the interconnection layer has a substantially rectangular shape.
18. The semiconductor package of claim 14 , wherein the interconnection layer has a substantially circular shape.