Inner spacer formation and contact resistance reduction in nanosheet transistors

1. A method of fabricating a semiconductor device, the method comprising:

performing fabrication operations to form a nanosheet field effect transistor device, wherein the fabrication operations include:

forming a stack over a substrate;

wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;

wherein the stack further comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);

wherein L is greater than W;

forming source or drain (S/D) regions along the length (L) of the lateral sidewalls; and

forming a cavity in portions of the sacrificial nanosheet, wherein the sacrificial nanosheet comprises a first type of semiconductor material and a second type of semiconductor material.

2. The method of claim 1 , wherein forming the S/D regions comprises epitaxially growing the source and drain regions.

3. The method of claim 2 , wherein the lateral sidewalls comprise a portion of the channel nanosheet.

4. The method of claim 3 , wherein a seed material for the epitaxial growth of the S/D regions comprises the portion of the lateral sidewalls that comprise the channel nanosheet.

5. The method of claim 4 , wherein the channel nanosheet comprises single crystalline silicon.

6. The method of claim 5 , wherein the stack comprises an elongated, fin-shaped structure.

7. The method of claim 1 further comprising forming a dummy gate structure over and around a portion of the stack.

8. The method of claim 7 further comprising:

removing portions of the sacrificial nanosheets from portions of the stack that are under the dummy gate;

removing the dummy gate; and

forming a replacement metal gate structure in spaces that were occupied by the dummy gate and the portions of the sacrificial nanosheets that were under the dummy gate.

9. The method of claim 1 further comprising depositing an oxide of the second type of semiconductor material in the cavity to form an interface between the sacrificial nanosheet and the oxide of the second type of semiconductor material.

10. The method of claim 9 further comprising performing at least one anneal operation on the interface sufficient to result in the sacrificial nanosheet layer and the oxide of the second type of semiconductor material interacting to convert at least a portion of the oxide of the second type of semiconductor material to an oxide of the first type of semiconductor material.

11. The method of claim 10 , wherein the at least one anneal operation comprises a first anneal at a first predetermined temperature.

12. The method of claim 11 , wherein:

the first type of semiconductor material comprises silicon; and

the second type of semiconductor material comprises germanium.

13. A method of fabricating a semiconductor device, the method comprising:

performing fabrication operations to form a nanosheet field effect transistor device, wherein the fabrication operations include:

forming a stack over a substrate;

wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;

wherein the stack comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);

wherein L is greater than W;

forming, using an epitaxial growth process, source or drain (S/D) regions along the length (L) of the lateral sidewalls; and

forming inner spacers by performing a chemical reaction that comprises converting an oxide of a second type of semiconductor material to an oxide of a first type of semiconductor material;

wherein forming the inner spacers further comprises forming a cavity in portions of the sacrificial nanosheet; and

wherein the sacrificial nanosheet comprises the first type of semiconductor material and the second type of semiconductor material.

14. The method of claim 13 further comprising depositing the oxide of the second type of semiconductor material in the cavity to form an interface between the sacrificial nanosheet and the oxide of the second type of semiconductor material.

15. The method of claim 14 , wherein:

performing the chemical reaction further comprises performing at least one anneal operation on the interface sufficient to result in the sacrificial nanosheet layer and the oxide of the second type of semiconductor material interacting to convert at least a portion of the oxide of the second type of semiconductor material to the oxide of the first type of semiconductor material; and

the at least one anneal operation comprises a first anneal at a first predetermined temperature.

16. The method of claim 15 , wherein:

the first type of semiconductor material comprises silicon; and

the second type of semiconductor material comprises germanium.

17. A nanosheet field effect transistor device comprising:

a stack formed over a substrate;

wherein the stack comprises alternating layers of sacrificial nanosheets and channel nanosheets over the substrate;

wherein the stack comprises lateral sidewalls having a length (L) and end sidewalls having a width (W);

wherein L is greater than W;

source or drain (S/D) regions epitaxially grown along the length (L) of the lateral sidewalls; and

inner spacers formed adjacent portions of the sacrificial nanosheet layers;

wherein the sacrificial nanosheet comprises a first type of semiconductor material and a second type of semiconductor material; and

wherein the inner spacers comprise an oxide of the first type of semiconductor material, wherein the oxide of the first type of material comprises a result from a chemical reaction between an oxide of the second type of semiconductor material and the sacrificial inner spacers.

18. The device of claim 17 , wherein:

the first type of semiconductor material comprises silicon; and

the second type of semiconductor material comprises germanium.