IP Library Granted Patent US 10,452,283
Granted Patent B2
US 10,452,283 · App. 16/123,586 · Granted Oct 22, 2019

Information processing apparatus, method for controlling information processing apparatus, non-transitory recording medium storing control tool, host device, non-transitory recording medium storing performance evaluation tool, and performance evaluation method for external memory device

Inventor: Daisuke Hashimoto (Yokohama, JP)
Assignee: Toshiba Memory Corporation
G06F3/0616G06F3/0619G06F3/0647G06F3/0652G06F3/0653G06F3/0659G06F3/0679G06F9/4401G06F11/004G06F11/0754G06F11/1068G06F11/1417G06F11/1456G06F11/3485G06F12/10G11C29/52G06F9/4403G06F9/4406G06F9/4416G06F9/44505G06F11/1461G06F11/3419G06F2201/81G06F2212/1032G06F2212/2022G06F2212/65
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Quick Facts
Patent No.
US 10,452,283
App. No.
16/123,586
Granted
Oct 22, 2019
Kind
B2
Abstract

According to the embodiments, a nonvolatile memory device is configured to store a normal operating system, and store a bootloader. A host device is capable of initiating the normal operating system by using the bootloader. The host device is configured to determine whether a first condition is established based on information obtained from the nonvolatile memory device; and rewrite, when determined the first condition is established, the bootloader so that an emergency software is initiated when booting the host device. The emergency software is executed on the host device. The host device is capable of issuing only a read command to the nonvolatile memory device under a control of the emergency software.

Claims (40)

1. A non-transitory storage medium storing a control program loaded in a host device to which a semiconductor memory device is connectable,

the semiconductor memory device comprising:

a nonvolatile semiconductor memory including memory cells for storing data, and configured to electrically erase, in a first unit, data stored in the memory cells, the first unit including the plurality of memory cells;

a volatile semiconductor memory;

a controller;

a temperature sensor; and

a host interface,

each of the nonvolatile semiconductor memory and the volatile semiconductor memory being configured to store first information for specifying a physical address of the nonvolatile semiconductor memory corresponding to logical address information received via the host interface,

when receiving the write command via the host interface, the controller being configured to generate a correction code by using data specified by the received write command and to store the data and the correction code in the nonvolatile semiconductor memory, and

when receiving the read command via the host interface, based on data and a corresponding correction code read from the nonvolatile semiconductor memory using the first information, the controller being configured to correct the read data,

the nonvolatile semiconductor memory being configured to further store:

second information based on a total number of pieces of write data received according to the received write command;

third information based on a total number of pieces of data read from the nonvolatile semiconductor memory according to the received read command;

fourth information related to a number of pieces of data that have not been corrected by using the corresponding correction code among data read from the nonvolatile semiconductor memory;

fifth information indicating, with the first unit, information corresponding to a number of memory cells in the nonvolatile semiconductor memory that are determined to be unable to write data therein;

sixth information corresponding to a number of the memory cells in the nonvolatile semiconductor memory that are determined to be able to write data therein; and

seventh information based on a temperature measured by using the temperature sensor, wherein

the control program is configured to cause the host device to:

transmit the write command and the read command to the semiconductor memory device;

read the second information from the semiconductor memory device;

read the third information from the semiconductor memory device;

read the fourth information from the semiconductor memory device;

read the fifth information from the semiconductor memory device;

read the sixth information from the semiconductor memory device;

read the seventh information from the semiconductor memory device;

display, on a display device connected to the host device, first status information of the nonvolatile semiconductor memory based on the read second information or the read third information, second status information of the nonvolatile semiconductor memory based on the read fourth information or the read fifth information, and third status information of the nonvolatile semiconductor memory based on the read seventh information, and

transmit, to the semiconductor memory device, a certain command that specifies logical address information, and

the semiconductor memory device is configured to erase, in the first unit, data stored in a corresponding physical address based on the certain command and the logical address information received from the host device, and to change the sixth information.

2. The non-transitory storage medium according to claim 1 , wherein a color of an icon included in the first status information is changed when the second information or the third information has exceeded a first threshold.

3. The non-transitory storage medium according to claim 1 , wherein the second status information indicates a remaining lifespan of the semiconductor memory device, and when the remaining lifespan becomes less than a second threshold, a warning screen is displayed on the display device.

4. The non-transitory storage medium according to claim 3 , wherein the control program is configured to cause the host device to acquire a third to eighth threshold corresponding to each of the second to seventh information from the semiconductor memory device.

5. The non-transitory storage medium according to claim 4 , wherein the control program is configured to cause the host device to calculate the remaining lifespan based on at least one piece of information among the acquired second to seventh information.

6. The non-transitory storage medium according to claim 5 , wherein the control program is configured to cause the host device to calculate the remaining lifespan based on at least one piece of the information among the acquired second to seventh information and at least one threshold among the acquired third to eighth threshold.

7. The non-transitory storage medium according to claim 3 , wherein the warning screen includes a message that prompts back up of data stored in the semiconductor memory device.

8. The non-transitory storage medium according to claim 7 , wherein the control program is configured to cause the host device to display time-series data of the at least one piece of information stored in the memory on the display device.

9. The non-transitory storage medium according to claim 1 , wherein each of the second to seventh information includes an attribute ID.

10. The non-transitory storage medium according to claim 9 , wherein the host device including a nonvolatile memory, and wherein the control program is configured to cause the host device to back up the at least one piece of information stored in the memory into the nonvolatile memory.

11. The non-transitory storage medium according to claim 1 , wherein the nonvolatile semiconductor memory is a NAND type flash memory, wherein a capacitance of the semiconductor memory device is larger than a capacitance of data that is accessible from the host device.

12. The non-transitory storage medium according to claim 11 , wherein the control program is configured to cause the host device to erase old data among data stored in the nonvolatile memory when data is backed up in the nonvolatile memory.

13. The non-transitory storage medium according to claim 1 , wherein the host device including a memory, and the control program is configured to cause the host device to be capable of storing at least one piece of information among the second to seventh information acquired from the semiconductor memory device into the memory.

Assignments (3)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
Priority Claims (2)
JP 2011-179890 · Aug 19, 2011 · national
JP 2011-186542 · Aug 29, 2011 · national
Continuity (4)
Continuation 15399475 · Jan 5, 2017
Continuation 14178654 · Feb 12, 2014
Continuation PCTJP2012070777 · Aug 9, 2012
Related Publication 20190012098A1 · Jan 10, 2019