Barrier layer for dielectric layers in semiconductor devices
A semiconductor device having a high-k gate dielectric, and a method of manufacture, is provided. A gate dielectric layer is formed over a substrate. An interfacial layer may be interposed between the gate dielectric layer and the substrate. A barrier layer, such as a TiN layer, having a higher concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer is formed. The barrier layer may be formed by depositing, for example, a TiN layer and performing a nitridation process on the TiN layer to increase the concentration of nitrogen along an interface between the barrier layer and the gate dielectric layer. A gate electrode is formed over the barrier layer.
1. A semiconductor device comprising:
a gate dielectric layer over a substrate;
a conductive layer over and in contact with the gate dielectric layer, the conductive layer having a higher relative nitrogen concentration along a top surface than at a location away from the top surface;
a silicon cap over and in contact with the conductive layer; and
a metal gate electrode over and in contact with the silicon cap.
2. The semiconductor device of claim 1 , wherein the conductive layer comprises a TixNy layer.
3. The semiconductor device of claim 2 , wherein the TixNy layer comprises a ratio of y:x of about 1.0 to about 1.2 along the top surface of the conductive layer.
4. The semiconductor device of claim 3 , wherein the TixNy layer comprises a ratio of y:x of about 0.85 to about 0.98 at a location away from the top surface of the conductive layer.
5. The semiconductor device of claim 1 , further comprising gate spacers over the substrate and adjacent to the gate dielectric layer.
6. The semiconductor device of claim 5 , further comprising an inter-layer dielectric over the substrate, the gate spacers and the metal gate electrode.
7. The semiconductor device of claim 6 , further comprising:
source/drain regions in the substrate; and
a silicide region over each of the source/drain regions.
8. The semiconductor device of claim 1 , further comprising an interfacial layer over the substrate.
9. The semiconductor device of claim 8 , wherein the interfacial layer comprises an oxide layer.
10. A semiconductor device comprising:
a raised structure over a substrate, the raised structure comprising:
gate spacers;
a gate dielectric layer over the substrate, the gate dielectric layer having a first horizontal portion and first vertical portions, the first vertical portions adjacent to the gate spacers;
a conductive layer over and in contact with the gate dielectric layer, the conductive layer having a second horizontal portion and second vertical portions, the second vertical portions adjacent to the first vertical portions of the gate dielectric layer, wherein a top surface of the second horizontal portion has a higher nitrogen concentration than a location of the second horizontal portion away from the top surface;
a silicon cap over and in contact with the conductive layer; and
a gate electrode over and in contact with the silicon cap;
a source/drain region on each side of the raised structure; and
a silicide region over each source/drain region.
11. The semiconductor device of claim 10 , further comprising an interfacial layer over the substrate.
12. The semiconductor device of claim 11 , wherein the interfacial layer comprises an oxide layer.
13. The semiconductor device of claim 12 , further comprising spacers over the substrate and adjacent to the first vertical portions of the gate dielectric layer.
14. The semiconductor device of claim 13 , further comprising:
an inter-layer dielectric over the substrate, the spacers, and the gate electrode; and
a contact through the inter-layer dielectric, the contact contacting the gate electrode.
15. The semiconductor device of claim 10 , wherein the first vertical portions, the second vertical portions, and the gate electrode are level.
16. The semiconductor device of claim 10 , wherein the conductive layer comprises a TixNy layer, the nitrogen to titanium concentrations in the top surface having a ratio y:x of about 1.0 to about 1.2.
17. The semiconductor device of claim 16 , wherein the conductive layer comprises a TixNy layer, the nitrogen to titanium concentrations in the location away from the top surface having a ratio y:x of about 0.85 to about 0.98.
18. A semiconductor device comprising:
a substrate;
a dielectric layer over the substrate, the dielectric comprising an oxide;
a barrier layer over and in contact with the dielectric layer, the barrier layer comprising a first TixNy layer along a top surface of the barrier layer, a ratio of y:x being from about 1.0 to about 1.2 at the first TixNy layer, and the barrier layer comprising a second TixNy layer at a location away from the top surface of the barrier layer, a ratio of y:x of about 0.85 to about 0.98 at the second TixNy layer;
a silicon cap over and in contact with the barrier layer;
a metal gate electrode over and in contact with the silicon cap;
sidewall spacers over the substrate, the metal gate electrode being interposed between the sidewall spacers;
an inter-layer dielectric over the metal gate electrode; and
a contact through the inter-layer dielectric and over the metal gate electrode.
19. The semiconductor device of claim 18 , further comprising an interfacial layer over the substrate.
20. The semiconductor device of claim 18 , further comprising:
source/drain regions along a top surface of the substrate, the source/drain regions located on opposite sides of the dielectric layer;
silicide regions over the source/drain regions; and
sidewall spacers over the source/drain regions.