IP Library Granted Patent US 10,453,964
Granted Patent B2
US 10,453,964 · App. 15/661,307 · Granted Oct 22, 2019

Semiconductor device and method for manufacturing the same

Inventors: Shunpei Yamazaki (Setagaya, JP); Junichi Koezuka (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/02554H01L21/02565H01L21/02631H01L21/425H01L21/426H01L21/823418H01L29/24H01L29/36H01L29/66969
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Quick Facts
Patent No.
US 10,453,964
App. No.
15/661,307
Granted
Oct 22, 2019
Kind
B2
Abstract

A transistor including an oxide semiconductor, which has good on-state characteristics, and a high-performance semiconductor device including a transistor capable of high-speed response and high-speed operation. In the transistor including an oxide semiconductor, oxygen-defect-inducing factors are introduced (added) into an oxide semiconductor layer, whereby the resistance of a source and drain regions are selectively reduced. Oxygen-defect-inducing factors are introduced into the oxide semiconductor layer, whereby oxygen defects serving as donors can be effectively formed in the oxide semiconductor layer. The introduced oxygen-defect-inducing factors are one or more selected from titanium, tungsten, and molybdenum, and are introduced by an ion implantation method.

Claims (17)

1. A method for manufacturing a semiconductor device comprising:

forming a first oxide semiconductor layer by a sputtering method;

crystallizing a region of the first oxide semiconductor layer by a first heat treatment, the region including a surface of the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer by a sputtering method;

crystallizing the second oxide semiconductor layer by a second heat treatment;

wherein the second oxide semiconductor layer includes In, Ga, and Zn, and

wherein the second oxide semiconductor layer includes a crystal whose c-axis is aligned in a direction perpendicular to a surface of the second oxide semiconductor layer.

2. The semiconductor device according to claim 1 ,

wherein the first heat treatment is performed at higher than or equal to 450° C. and lower than or equal to 850° C. for greater than or equal to 1 minute and less than or equal to 24 hours, and

wherein the second heat treatment is performed at higher than or equal to 450° C. and lower than or equal to 850° C. for greater than or equal to 1 minute and less than or equal to 400 hours.

3. A method for manufacturing a semiconductor device comprising:

forming a first oxide semiconductor layer by a sputtering method;

heating the first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer by a sputtering method;

heating the second oxide semiconductor layer;

wherein the second oxide semiconductor layer includes In, Ga, and Zn, and

wherein the second oxide semiconductor layer includes a crystal whose c-axis is aligned in a direction perpendicular to a surface of the second oxide semiconductor layer.

Priority Claims (1)
JP 2009-288428 · Dec 18, 2009 · national
Continuity (4)
Continuation 15177480 · Jun 9, 2016
Continuation 14964898 · Dec 10, 2015
Continuation 12968338 · Dec 15, 2010
Related Publication 20170323976A1 · Nov 9, 2017
Cited By (4)
US 12,191,313 US 12,199,186 US 12,261,119 US 12,414,334