IP Library › Granted Patent US 10,461,778
Granted Patent B2
US 10,461,778 · App. 15/581,377 · Granted Oct 29, 2019

Interleaving and puncturing apparatus and method thereof

Inventors: Hong-sil Jeong (Suwon-si, KR); Sang-hyo Kim (Seoul, KR); Kyung-joong Kim (Seoul, KR); Se-ho Myung (Yongin-si, KR); Jong-hwan Kim (Suwon-si, KR); Dae-hyun Ryu (Seongnam-si, KR); Min Jang (Seoul, KR)
Assignees: SAMSUNG ELECTRONICS CO., LTD.; RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
H03M13/2792H03M13/13H03M13/271H03M13/6362
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Quick Facts
Patent No.
US 10,461,778
App. No.
15/581,377
Granted
Oct 29, 2019
Kind
B2
Abstract

An apparatus and method for interleaving and puncturing are provided. The apparatus includes: an interleaver formed of a plurality of columns and rows, configured to perform interleaving by writing bits input to the interleaver in the plurality of columns and reading the bits from each row of the plurality of columns in which the bits are written; and a puncturer configured to puncture a predetermined number of bits among the bits read from the interleaver.

Claims (17)

1. An apparatus comprising at least one processor to implement:

an interleaver configured to write bits in a plurality of columns, and read the written bits,

wherein the plurality of columns comprise a first column, a second column, and a third column, and

wherein the interleaver is configured to read the written bits by skipping a first bit written in a row of the first column and sequentially reading a second bit written in the row of the second column and a third bit written in the row of the third column.

2. The apparatus as claimed in claim 1 , wherein the first bit and the second bit are bits written, respectively, in columns which are not adjacent to each other.

3. The apparatus as claimed in claim 1 , wherein the interleaver is configured to read the third bit adjacent the first bit from the row and reads the second bit which is not adjacent to the third bit from the row without reading the first bit.

4. The apparatus as claimed in claim 1 , further comprising:

a puncturer configured to puncture one or more bits of the read bits.

5. A method comprising:

writing bits in a plurality of columns; and

reading the written bits,

wherein the plurality of columns comprise a first column, a second column and a third column, and

wherein the reading reads the written bits by skipping a first bit written in a row of the first column and sequentially reading a second bit written in the row of the second column and a third bit written in the row of the third column.

6. The method as claimed in claim 5 , wherein the first bit and the second bit are bits written, respectively, in columns which are not adjacent to each other.

7. The method as claimed in claim 5 , wherein the reading reads the third bit adjacent the first bit from the row and reads the second bit which is not adjacent to the third bit from the row without reading the first bit.

8. The method as claimed in claim 5 , further comprising:

puncturing at least one bit of the read bits.

Priority Claims (1)
KR 10-2014-0058327 · May 15, 2014 · national
Continuity (2)
Continuation 14604138 · Jan 23, 2015
Related Publication 20170230063A1 · Aug 10, 2017
Cited By (1)
US 12,362,855