IP Library Granted Patent US 10,466,515
Granted Patent B2
US 10,466,515 · App. 15/071,105 · Granted Nov 5, 2019

On-chip optical isolator

Inventors: John Heck (Berkeley, CA); David N. Hutchison (Santa Clara, CA); Jie Sun (Mountain View, CA); Haisheng Rong (Pleasanton, CA); Woosung Kim (Mountain View, CA)
Assignee: Intel Corporation
G02F1/0955G02B6/12004G02B6/131G02B6/132G02F1/0036H01S5/0064G02B6/2766G02B6/29352G02B2006/1208G02B2006/1215G02B2006/12038G02B2006/12061G02B2006/12078G02B2006/12121G02B2006/12157
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Quick Facts
Patent No.
US 10,466,515
App. No.
15/071,105
Granted
Nov 5, 2019
Kind
B2
Abstract

Embodiments herein relate to photonic integrated circuits with an on-chip optical isolator. A photonic transmitter chip may include a laser and an on-chip isolator optically coupled with the laser that includes an optical waveguide having a section coupled with a magneto-optic liquid phase epitaxy grown garnet film. In some embodiments, a cladding may be coupled with the garnet film, the on-chip isolator may be arranged in a Mach-Zehnder interferometer configuration, the waveguide may include one or more polarization rotators, and/or the garnet film may be formed of a material from a rare-earth garnet family. Other embodiments may be described and/or claimed.

Claims (26)

1. A photonic integrated circuit, comprising:

an on-chip laser over an optical waveguide on a chip; and

an on-chip isolator on the chip, to receive an output of the on-chip laser, wherein the on-chip isolator includes the optical waveguide, a magneto-optic liquid phase epitaxy grown garnet film on the optical waveguide, and a lattice matched substrate on the garnet film, wherein a first portion of the optical waveguide extends from the on-chip laser to the garnet film, and wherein a second portion of the optical waveguide and the on-chip laser are covered by a cladding, the isolator is within an opening of the cladding, and the garnet film of the isolator is below a top surface of the cladding.

2. The photonic integrated circuit of claim 1 , wherein the cladding is coupled with the garnet film.

3. The photonic integrated circuit of claim 2 , wherein the cladding includes silicon oxynitride or silicon nitride.

4. The photonic integrated circuit of claim 1 , wherein the optical waveguide is a first optical waveguide and the on-chip isolator further comprises a second optical waveguide, wherein the garnet film is coupled with both the first and second optical waveguides and the on-chip isolator is arranged in a Mach-Zehnder interferometer configuration.

5. The photonic integrated circuit of claim 4 , wherein the on-chip isolator further comprises:

a first splitter coupled with the first and second optical waveguides; and

a second splitter coupled with the first and second optical waveguides, wherein the garnet film is coupled with a section of the first and second optical waveguides between the first and second splitters.

6. The photonic integrated circuit of claim 1 , wherein the garnet film is formed of a material from a rare-earth garnet family.

7. The photonic integrated circuit of claim 6 , wherein the garnet film includes a rare-earth iron garnet material, a rare-earth gallium garnet material, or a rare-earth aluminum garnet material.

8. The photonic integrated circuit of claim 7 , wherein the garnet film includes at least one of Bismuth, Lutetium, Holmium, Gadolinium, or Yttrium.

9. The photonic integrated circuit of claim 1 , wherein the optical waveguide has a width of greater than or equal to 220 nanometers and less than or equal to 300 nanometers along the section of the optical waveguide coupled with the garnet film, wherein the section extends along the entire length of the optical waveguide coupled with the garnet film.

10. The photonic integrated circuit of claim 1 , wherein the on-chip isolator further comprises:

a first polarization rotator; and

a second polarization rotator, wherein the first and second polarization rotators are spaced apart along the section of the optical waveguide coupled with the garnet film.

11. The photonic integrated circuit of claim 1 , wherein the on-chip isolator further comprises a cladding coupled with the garnet film, wherein:

the cladding includes silicon dioxide, silicon oxynitride, or silicon nitride;

the garnet film includes a rare-earth iron garnet material, a rare-earth gallium garnet material, or a rare-earth aluminum garnet material;

the optical waveguide is a first optical waveguide and the on-chip isolator further comprises a second optical waveguide;

the garnet film is coupled with both the first and second optical waveguides;

the on-chip isolator is arranged in a Mach-Zehnder interferometer configuration; and

the on-chip isolator further comprises at least one polarization rotator in a section of at least one of the first and second optical waveguides coupled with the garnet film.

12. The photonic integrated circuit of claim 1 , wherein the chip is a photonic wafer.

13. The photonic integrated circuit of claim 12 , wherein the photonic wafer is a silicon photonic wafer or a silicon on insulator (SOI) wafer.

14. The photonic integrated circuit of claim 13 , wherein the photonic wafer is the SOI wafer and the optical waveguide is in a silicon layer of the SOI wafer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2016
From: HECK, JOHN; HUTCHISON, DAVID N.; SUN, JIE; RONG, HAISHENG; KIM, WOOSUNG
To: INTEL CORPORATION
Reel/Frame 037991/0081 →
Continuity (1)
Related Publication 20170269395A1 · Sep 21, 2017
Cited By (1)
US 12,298,558