IP Library › Granted Patent US 10,468,344
Granted Patent B2
US 10,468,344 · App. 15/973,049 · Granted Nov 5, 2019

Method of manufacturing semiconductor devices and corresponding product

Inventor: Federico Giovanni Ziglioli (Pozzo d'Adda, IT)
Assignee: STMicroelectronics S.r.L.
H01L23/49861H01L21/486H01L21/565H01L23/3107H01L23/3121H01L23/49827H01L23/49838H01L24/48H01L24/85H01L25/105H01L25/50H01L21/4867H01L2224/48091H01L2224/48101H01L2224/48245
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Quick Facts
Patent No.
US 10,468,344
App. No.
15/973,049
Granted
Nov 5, 2019
Kind
B2
Abstract

A method of manufacturing semiconductor products includes: providing a semiconductor product lead frame including a semiconductor die mounting area and an array of electrically conductive leads, molding semiconductor product package molding material, e.g., laser direct structuring material, and forming on the package molding material molded onto the lead frame electrically-conductive lines extending between the semiconductor die mounting area and the array of electrically-conductive leads.

Claims (39)

1. A method, comprising:

molding a laser direct structuring (LDS) package molding material on a portion of a lead frame, the lead frame including a die pad and an array of electrically-conductive leads; and

forming electrically-conductive lines on the LDS package molding material, wherein forming the electrically-conductive lines includes laser activating the LDS package molding material, the electrically-conductive lines extending between the die pad and the array of electrically-conductive leads, the electrically conductive lines being coupled to the electrically-conductive leads.

2. The method of claim 1 , wherein forming the electrically-conductive lines includes at least one of:

forming at least one electrically-conductive metallization layer on the LDS package molding material;

overmolding at least one dielectric layer onto the electrically-conductive lines; and

forming electrically-conductive vias through the LDS package molding material molded onto the lead frame.

3. The method of claim 1 , wherein the die pad is recessed below a surface of the array of electrically-conductive leads.

4. The method of claim 1 , further comprising:

providing at least one downset portion in at least one of the leads in the lead frame,

molding the LDS package molding material onto the downset portion, and

forming at least one electrically-conductive line over the LDS package molding material filling the downset portion.

5. The method of claim 1 , further comprising arranging at least one electrical component bridge-like between leads in the array of electrically-conductive leads by providing insulating material over leads bridged over by the at least one electrical component.

6. The method of claim 1 , further comprising:

mounting at least one semiconductor die to the die pad of the lead frame and coupling conductive wires between the at least one semiconductor die and the array of electrically-conductive leads, respectively; or

mounting at least one semiconductor die to the die pad of the lead frame by flip-chip mounting onto proximal ends of electrically-conductive lines formed on the LDS package molding material.

7. The method of claim 1 , further comprising;

attaching a semiconductor die to the die pad; and

molding a package molding material.

8. The method of claim 1 , further comprising mounting a plurality of semiconductor dice at the die pad of the lead frame.

9. The method of claim 1 further comprising:

plating routing traces on the electrically-conductive lines.

10. A device, comprising:

a lead frame including a die pad and an array of electrically conductive leads;

an LDS package molding material molded to the lead frame, the LDS package molding material forming a first surface and having laser activated conductive lines; and

electrically-conductive routing traces on the laser activated conductive lines of the first surface of the LDS package molding material and extending between the die pad and the array of electrically-conductive leads.

11. The device of claim 10 , further comprising a semiconductor die coupled to the die pad.

12. The device of claim 11 , further comprising a package molding material covering the semiconductor die and the electrically-conductive lines.

13. The device of claim 12 wherein the package molding material is same material as the LDS package molding material.

14. The device of claim 12 wherein a back surface of the die pad is exposed from the LDS package molding material.

15. A semiconductor package, comprising:

a lead frame including a die pad and conductive leads;

an LDS package molding material molded to the lead frame and coupling the die pad to the conductive leads, the LDS package molding material forming a first surface and having laser activated conductive lines;

conductive routing traces on the laser activated conductive lines of the first surface of the LDS package molding material, the conductive routing traces coupled to the conductive leads, respectively; and

a first semiconductor die coupled to the die pad.

16. The device of claim 15 , further comprising a package molding material covering the first semiconductor die and the conductive lines, the package molding material having a surface facing the first surface of the LDS package molding material.

17. The device of claim 16 , further comprising conductive wires having first ends coupled to the first semiconductor die and second ends coupled to the conductive leads.

18. The semiconductor package of claim 15 , comprising a second semiconductor die stacked on the first semiconductor die.

19. The semiconductor package of claim 15 wherein a portion of the conductive routing traces are embedded in the LDS package molding material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2018
From: ZIGLIOLI, FEDERICO GIOVANNI
To: STMICROELECTRONICS S.R.L.
Reel/Frame 045735/0939 →
Priority Claims (1)
IT 102017000055987 · May 23, 2017 · national
Continuity (1)
Related Publication 20180342453A1 · Nov 29, 2018
Cited By (1)
US 12,424,521