IP Library › Granted Patent US 10,468,383
Granted Patent B2
US 10,468,383 · App. 15/544,118 · Granted Nov 5, 2019

Semiconductor device and manufacturing method thereof

Inventor: Makoto Shizukuishi (Sendai, JP)
H01L25/0657G01T1/242G01T7/00H01L23/481H01L27/14H01L27/144H01L27/146H01L27/1485H01L27/14685H01L27/14687H01L27/14812H01L27/14875H01L31/08H01L21/02164H01L21/02271H01L21/265H01L21/3065H01L21/30625H01L29/76891H01L2225/06544
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Quick Facts
Patent No.
US 10,468,383
App. No.
15/544,118
Granted
Nov 5, 2019
Kind
B2
Abstract

A semiconductor device includes n semiconductor chips stacked via electrical contacting means in the silicon substrate thickness direction, n being an integer larger than 2, a side face of the stacked semiconductor device in the substrate thickness direction being covered by a non-conductive layer. The shape of the side face with respect to a plan view of the stacked semiconductor device may be one of curved, convex, concave or circular.

Claims (61)

1. A semiconductor device comprising:

a stacked structure including a plurality of semiconductor chips stacked successively in a first direction that is parallel to a Z-axis, the plurality of semiconductor chips being electrically connected to each other through electrical contacts located in between adjacent pairs of semiconductor chips among the plurality of semiconductor chips,

each of the plurality of semiconductor chips including,

a top surface that is parallel to an X-Y plane defined by an X-axis and a Y-axis,

a bottom surface that is opposite the top surface and parallel to the X-Y plane, and

a plurality of side surfaces that are parallel to the Z-axis, the plurality of side surfaces including,

a first side surface that includes a continuous curve with respect to the X-Y plane, and

second through fourth side surfaces,

a length of the continuous curve being greater than half an entire length of the first side surface with respect to the X-Y plane,

the stacked structure having a 4-sided footprint with respect to the X-Y plane,

the 4-sided footprint being defined by the first through fourth side surfaces of each of the plurality of semiconductor chips.

2. The semiconductor device of claim 1 wherein,

the first side surfaces of the plurality of semiconductor chips are covered by a non-conductive layer, and

the second through fourth side surfaces of the plurality of semiconductor chips are not covered by a silicon dioxide (SiO 2 ) layer.

3. The semiconductor device of claim 1 , wherein one or more semiconductor chips from among the plurality of semiconductor chips include a plurality of through silicon via (TSV) electrodes located in peripheral portions of the one or more semiconductor chips adjacent to the second through fourth side surfaces of the one or more semiconductor chips.

4. The semiconductor device of claim 1 wherein the continuous curves of the first side surfaces of the plurality of semiconductor chips are convex with respect to the X-Y plane.

5. The semiconductor device of claim 1 wherein the continuous curves of the first side surfaces of the plurality of semiconductor chips are concave with respect to the X-Y plane.

6. The semiconductor device of claim 1 , wherein one or more semiconductor chips from among the plurality of semiconductor chips further include opt-electrical conversion regions that extend inward from the first side surfaces of the one or more semiconductor chips in a direction parallel to the top surfaces of the one or more semiconductor chips.

7. The semiconductor device of claim 6 , wherein the opt-electrical conversion regions of the one or more semiconductor chips extend radially from the continuous curves of the first side surfaces of the one or more semiconductor chips.

8. The semiconductor device of claim 6 , further comprising:

optical shield layers on the bottom surfaces of the one or more semiconductor chips.

9. The semiconductor device of claim 6 , further comprising:

first elements on the first side surfaces of the one or more semiconductor chips, each first element being a scintillator or a color filter.

10. A semiconductor module comprising:

a plurality of first semiconductor devices,

wherein each of the plurality of first semiconductor devices has the structure of the semiconductor device of claim 1 , and the plurality of first semiconductor devices are arranged adjacent to each other such that the continuous curves of the first side surfaces of the plurality of first semiconductor devices form a substantially circular surface.

11. A semiconductor device comprising:

a stacked structure including a plurality of semiconductor chips stacked successively in a first direction that is parallel to a Z-axis, the plurality of semiconductor chips being electrically connected to each other through electrical contacts located in between adjacent pairs of semiconductor chips among the plurality of semiconductor chips,

each of the plurality of semiconductor chips including,

a top surface that is parallel to an X-Y plane defined by an X-axis and a Y-axis,

a bottom surface that is opposite the top surface and parallel to the X-Y plane, and

a plurality of side surfaces that are parallel to the Z-axis, the plurality of side surfaces including,

a first side surface that is curved with respect to the X-Y plane, and

second through fourth side surfaces,

the stacked structure having a 4-sided footprint with respect to the X-Y plane,

the 4-sided footprint being defined by the first through fourth side surfaces of each of the plurality of semiconductor chips,

wherein one or more semiconductor chips from among the plurality of semiconductor chips further include opt-electrical conversion regions that extend inward from the curved first side surfaces of the one or more semiconductor chips in a direction parallel to the top surfaces of the one or more semiconductor chips.

12. A semiconductor module comprising:

a plurality of first semiconductor devices,

wherein, each first semiconductor device, from among the plurality of first semiconductor device, comprises:

a stacked structure including a plurality of semiconductor chips stacked successively in a first direction that is parallel to a Z-axis, the plurality of semiconductor chips being electrically connected to each other through electrical contacts located in between adjacent pairs of semiconductor chips among the plurality of semiconductor chips,

each of the plurality of semiconductor chips including,

a top surface that is parallel to an X-Y plane defined by an X-axis and a Y-axis,

a bottom surface that is opposite the top surface and parallel to the X-Y plane, and

a plurality of side surfaces that are parallel to the Z-axis, the plurality of side surfaces including,

a first side surface that is curved with respect to the X-Y plane, and

second through fourth side surfaces,

the stacked structure having a 4-sided footprint with respect to the X-Y plane,

the 4-sided footprint being defined by the first through fourth side surfaces of each of the plurality of semiconductor chips, and

wherein the plurality of first semiconductor devices are arranged adjacent to each other such that the curved first side surfaces of the plurality of first semiconductor devices form a substantially circular surface.

13. A semiconductor device comprising:

a stacked structure including a plurality of semiconductor chips stacked successively in a first direction that is parallel to a Z-axis, the plurality of semiconductor chips being electrically connected to each other through electrical contacts located in between adjacent pairs of semiconductor chips among the plurality of semiconductor chips,

each of the plurality of semiconductor chips including,

a top surface that is parallel to an X-Y plane defined by an X-axis and a Y-axis,

a bottom surface that is opposite the top surface and parallel to the X-Y plane, and

a plurality of side surfaces that are parallel to the Z-axis, the plurality of side surfaces including,

a first side surface that is curved with respect to the X-Y plane, and

second through fourth side surfaces,

the stacked structure having a 4-sided footprint with respect to the X-Y plane,

the 4-sided footprint being defined by the first through fourth side surfaces of each of the plurality of semiconductor chips,

wherein the curved first side surfaces of the plurality of semiconductor chips are convex with respect to the X-Y plane.

Priority Claims (2)
JP 2015-006782 · Jan 16, 2015 · national
JP 2015-168489 · Aug 28, 2015 · national
Continuity (1)
Related Publication 20170373042A1 · Dec 28, 2017
Cited By (1)
US 12,635,328