IP Library › Granted Patent US 10,468,409
Granted Patent B2
US 10,468,409 · App. 15/920,967 · Granted Nov 5, 2019

FinFET device with oxidation-resist STI liner structure

Inventors: Szu-Ping Lee (Changhua County, TW); Jian-Shiou Huang (Fangliao Township, Pingtung County, TW); Chih-Tang Peng (Zhubei, TW); Sung-En Lin (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L27/0886H01L21/823431H01L21/823821H01L21/823878H01L27/0924H01L27/10879H01L29/0649H01L29/41791H01L29/66795H01L29/7849
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Quick Facts
Patent No.
US 10,468,409
App. No.
15/920,967
Granted
Nov 5, 2019
Kind
B2
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a fin structure protruding from a semiconductor substrate. The fin structure includes a first portion and an overlying second portion. The first portion is formed of a material that is the same as that of the semiconductor substrate and different from that of the second portion. The semiconductor device structure also includes a liner structure and an isolation feature. The liner structure includes a carbon-doped silicon oxide film covering the semiconductor substrate and the first portion of the first fin structure and a nitrogen-containing film over the carbon-doped silicon oxide film. The isolation feature is over the nitrogen-containing film and surrounded by the liner structure.

Claims (52)

1. A semiconductor device structure, comprising:

a first fin structure protruding from a first region of a semiconductor substrate, wherein the first fin structure comprises a first portion and an overlying second portion and the first portion is formed of a material that is the same as that of the semiconductor substrate and different from that of the second portion;

a liner structure, comprising:

a carbon-doped silicon oxide film covering and in direct contact with the semiconductor substrate and the first portion of the first fin structure; and

a nitrogen-containing film over the carbon-doped silicon oxide film; and

an isolation feature over the nitrogen-containing film and surrounded by the liner structure.

2. The semiconductor device structure as claimed in claim 1 , further comprising:

a second fin structure protruding from a second region of the semiconductor substrate,

wherein the second fin structure is formed of a material that is the same as that of the semiconductor substrate, and

wherein the liner structure further covers a lower portion of the second fin structure, so that the lower portion of the second fin structure is spaced apart from the isolation feature by the liner structure.

3. The semiconductor device structure as claimed in claim 2 , wherein the second portion of the first fin structure is formed of an III-V group or IV group semiconductor material and the second fin structure is formed of silicon.

4. The semiconductor device structure as claimed in claim 2 , wherein the first region is a PMOS region and the second region is an NMOS region.

5. The semiconductor device structure as claimed in claim 1 , wherein the nitrogen-containing film comprises silicon nitride, carbon-doped silicon nitride, silicon oxynitride or carbon-doped silicon oxynitride.

6. The semiconductor device structure as claimed in claim 1 , wherein the second portion of the first fin structure is formed of silicon germanium (SiGe) and the first portion of the first fin structure is formed of silicon.

7. The semiconductor device structure as claimed in claim 1 , further comprising a gate structure over each of the first fin structure and the second fin structure, wherein the gate structure comprises:

a gate dielectric layer;

a gate electrode layer over the gate dielectric layer; and

gate spacers on opposing sidewalls of gate electrode layer.

8. A semiconductor device structure, comprising:

a first fin structure protruding from a first region of a semiconductor substrate, wherein the first fin structure comprises a first portion and an overlying second portion and the first portion is formed of a material that is the same as that of the semiconductor substrate and different from that of the second portion;

a liner structure, comprising:

a silicon oxide film covering and in direct contact with the semiconductor substrate and the first portion of the first fin structure; and

a carbon-containing film over the silicon oxide film; and

an isolation feature over the carbon-containing film, and surrounded by the liner structure.

9. The semiconductor device structure as claimed in claim 8 , further comprising:

a second fin structure protruding from a second region of the semiconductor substrate,

wherein the second fin structure is formed of a material that is the same as that of the semiconductor substrate,

wherein the liner structure further covers a lower portion of the second fin structure, so that the lower portion of the second fin structure is spaced apart from the isolation feature by the liner structure.

10. The semiconductor device structure as claimed in claim 9 , wherein the second portion of the first fin structure is formed of an III-V group or IV group semiconductor material and the second fin structure is formed of silicon.

11. The semiconductor device structure as claimed in claim 10 , wherein the first region is a PMOS region and the second region is an NMOS region.

12. The semiconductor device structure as claimed in claim 8 , wherein the carbon-containing film is a SiC, SiCN or SiCON film.

13. The semiconductor device structure as claimed in claim 8 , wherein the second portion of the first fin structure is formed of silicon germanium (SiGe) and the first portion of the first fin structure is formed of silicon.

14. The semiconductor device structure as claimed in claim 8 , further comprising a gate structure over each of the first fin structure and the second fin structure, wherein the gate structure comprises:

a gate dielectric layer;

a gate electrode layer over the gate dielectric layer; and

gate spacers on opposing sidewalls of gate electrode layer.

15. A semiconductor device structure, comprising:

a first fin structure protruding from a first region of a semiconductor substrate, wherein the first fin structure comprises a first portion and an overlying second portion and the first portion is formed of a material that is the same as that of the semiconductor substrate and different from that of the second portion;

a liner structure, comprising:

a silicon oxynitride film having a nitrided surface region and covering and in direct contact with the semiconductor substrate and the first portion of the first fin structure; and

an isolation feature over the nitrided surface region of the silicon oxynitride film and surrounded by the liner structure.

16. The semiconductor device structure as claimed in claim 15 , further comprising:

a second fin structure protruding from a second region of the semiconductor substrate,

wherein the second fin structure is formed of a material that is the same as that of the semiconductor substrate, and

wherein the liner structure further covers a lower portion of the second fin structure, so that the lower portion of the second fin structure is spaced apart from the isolation feature by the liner structure.

17. The semiconductor device structure as claimed in claim 16 , wherein the second portion of the first fin structure is formed of an III-V group or IV group semiconductor material and the second fin structure is formed of silicon.

18. The semiconductor device structure as claimed in claim 15 , wherein the silicon oxynitride film is a carbon-doped silicon oxynitride film.

19. The semiconductor device structure as claimed in claim 15 , wherein the second portion of the first fin structure is formed of silicon germanium (SiGe) and the first portion of the first fin structure is formed of silicon.

20. The semiconductor device structure as claimed in claim 15 , further comprising a gate structure over each of the first fin structure and the second fin structure, wherein the gate structure comprises:

a gate dielectric layer;

a gate electrode layer over the gate dielectric layer; and

gate spacers on opposing sidewalls of gate electrode layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2018
From: LEE, SZU-PING; HUANG, JIAN-SHIOU; PENG, CHIH-TANG; LIN, SUNG-EN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 045206/0087 →
Continuity (1)
Related Publication 20190287971A1 · Sep 19, 2019