IP Library Granted Patent US 10,475,495
Granted Patent B2
US 10,475,495 · App. 15/896,431 · Granted Nov 12, 2019

Integrated circuits with magnetic tunnel junctions and methods of producing the same

Inventors: Wai Cheung Law (Singapore, SG); Taiebeh Tahmasebi (Singapore, SG); Chim Seng Seet (Singapore, SG); Kai Hung Alex See (Singapore, SG); Gerard Joseph Lim (Singapore, SG); Wen Siang Lew (Singapore, SG)
Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
G11C11/161H01L27/228H01L43/02H01L43/12
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Quick Facts
Patent No.
US 10,475,495
App. No.
15/896,431
Granted
Nov 12, 2019
Kind
B2
Abstract

Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a magnetic tunnel junction stack. The magnetic tunnel junction stack includes a first free layer that is magnetic, a second free layer that is magnetic, and an insertion layer positioned between the first and second free layers. The insertion layer is non-magnetic, and the insertion layer includes terbium.

Claims (21)

1. An integrated circuit comprising a magnetic tunnel junction stack, wherein the magnetic tunnel junction stack comprises:

a total pinned layer that comprises a first pinned layer that is magnetic;

a total free layer that comprises a first free layer that is magnetic;

a tunnel barrier layer positioned between the total pinned layer and the total free layer, wherein the tunnel barrier layer is non-magnetic; and

a transition layer positioned between the total pinned layer and the tunnel barrier layer, wherein the transition layer is non-magnetic, wherein the transition layer comprises terbium at from about 30 to about 100 weight percent, based on a total weight of the transition layer, and wherein the transition layer comprises one or more of iron or cobalt at from about 5 to about 70 weight percent, based on the total weight of the transition layer.

2. The integrated circuit of claim 1 wherein the transition layer comprises the iron at from about 5 to about 70 weight percent, based on the total weight of the transition layer.

3. The integrated circuit of claim 1 wherein the transition layer comprises the cobalt at from about 5 to about 70 weight percent, based on the total weight of the transition layer.

4. The integrated circuit of claim 1 wherein the transition layer is amorphous.

5. The integrated circuit of claim 1 wherein the tunnel barrier layer comprises magnesium oxide.

6. The integrated circuit of claim 1 wherein the magnetic tunnel junction stack further comprises a polarizer layer positioned between the transition layer and the tunnel barrier layer.

7. The integrated circuit of claim 1 wherein:

the total pinned layer further comprises a second pinned layer that is magnetic, wherein the second pinned layer underlies the transition layer; and

a coupling layer positioned between the first pinned layer and the second pinned layer, wherein the coupling layer is non-magnetic.

8. The integrated circuit of claim 7 wherein:

the total free layer further comprises a second free layer that is magnetic, wherein the second free layer overlies the first free layer; and

an insertion layer positioned between the first free layer and the second free layer, wherein the insertion layer is non-magnetic, and wherein the insertion layer comprises terbium.

9. A method of producing an integrated circuit comprising:

forming a total fixed layer that is magnetic;

forming a transition layer overlying the total fixed layer, wherein the transition layer is non-magnetic, wherein the transition layer comprises terbium at from about 30 to about 100 weight percent, based on a total weight of the transition layer, and wherein the transition layer comprises one or more of iron or cobalt at from about 5 to about 70 weight percent, based on the total weight of the transition layer;

forming a tunnel barrier layer overlying the transition layer, wherein the tunnel barrier layer is non-magnetic; and

forming a first free layer overlying the tunnel barrier layer, wherein the first free layer is magnetic.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2018
From: LAW, WAI CHEUNG; TAHMASEBI, TAIEBEH; SEET, CHIM SENG; SEE, KAI HUNG ALEX; LIM, GERARD JOSEPH; LEW, WEN SIANG
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 044928/0951 →
Continuity (1)
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