Wrap-around contact plug and method manufacturing same
A method includes forming a source/drain region, and in a vacuum chamber or a vacuum cluster system, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region. The method further includes selectively etching the metal layer in the vacuum chamber, and selectively forming a metal nitride layer on the metal silicide layer. The selectively forming the metal nitride layer is performed in the vacuum chamber or a vacuum cluster system without vacuum break.
1. A method comprising:
forming a source/drain region;
in a vacuum chamber, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region, wherein the selective deposition is performed using a metal halide and hydrogen (H 2 ) as process gases;
selectively etching the metal layer in the vacuum chamber, wherein the selective etching is performed using the metal halide and hydrogen (H 2 ) as process gases; and
selectively forming a metal nitride layer on the metal silicide layer, wherein the selectively forming the metal nitride layer is performed in the vacuum chamber.
2. The method of claim 1 , wherein the selective deposition and the selectively etching the metal layer are in-situ performed without vacuum break therebetween.
3. The method of claim 1 , wherein the selectively etching the metal layer and the selectively forming the metal nitride layer are in-situ performed without vacuum break therebetween.
4. The method of claim 1 , wherein the metal silicide layer and the metal layer are formed simultaneously using same process gases.
5. The method of claim 1 , wherein the selectively forming the metal nitride layer comprises nitridating a surface layer of the metal silicide layer.
6. The method of claim 1 , wherein the selective deposition is performed using process gases comprising TiCl 4 .
7. The method of claim 1 , wherein the selectively etching is performed using process gases comprising TiCl 4 .
8. The method of claim 1 , wherein the selective deposition is performed at an elevated temperature between about 400° C. and about 500° C.
9. A method comprising:
forming a gate stack over a first portion of a semiconductor fin;
epitaxially growing a semiconductor material on a second portion of the semiconductor fin;
forming a first Contact Etch Stop Layer (CESL) and a first inter-layer dielectric covering the semiconductor material;
removing the first CESL and the first inter-layer dielectric;
in a vacuum chamber, simultaneously forming a metal layer and a metal silicide layer, wherein the metal silicide layer is formed on the semiconductor material;
without vacuum break, removing the metal layer;
without vacuum break, forming a metal silicon nitride layer on the metal silicide layer;
forming a second CESL covering the metal silicon nitride layer; and
forming a second inter-layer dielectric over the second CESL.
10. The method of claim 9 further comprising:
removing a dummy gate stack over the first portion of the semiconductor fin, wherein the gate stack is formed in a recess left by the dummy gate stack.
11. The method of claim 9 , wherein the simultaneously forming the metal layer and the metal silicide layer is performed using process gases comprising TiCl 4 .
12. The method of claim 11 , wherein the removing the metal layer is performed using additional process gases comprising TiCl 4 .
13. The method of claim 9 further comprising:
etching the first CESL and the first inter-layer dielectric to form a contact opening; and
filling the contact opening with a contact plug.
14. The method of claim 9 , wherein the metal layer and the metal silicide layer comprise a titanium layer and a titanium silicide layer, respectively.
15. A method comprising:
forming a gate stack over a first portion of a semiconductor fin;
epitaxially growing a semiconductor material on a second portion of the semiconductor fin;
simultaneously forming a metal layer and a metal silicide layer using a process gas comprising a halide, with plasma being turned on, wherein the metal silicide layer is formed on the semiconductor material;
removing the metal layer using the process gas, with plasma being turned off; and
forming a metal nitride layer on the metal silicide layer using a third process gas.
16. The method of claim 15 , wherein the process gas comprises a metal halide and hydrogen.
17. The method of claim 15 further comprising:
forming a first Contact Etch Stop Layer (CESL) and a first inter-layer dielectric covering the semiconductor material;
before the metal layer and the metal silicide layer are formed, removing the first CESL and the first inter-layer dielectric;
after the metal nitride layer is formed, forming a second CESL covering the metal nitride layer; and
forming a second inter-layer dielectric over the second CESL.
18. The method of claim 16 , wherein the metal layer comprises titanium, and the process gas comprise TiCl 4 .
19. The method of claim 15 , wherein the forming the metal nitride layer comprises converting a surface layer of the metal silicide layer into a metal silicon nitride layer.
20. The method of claim 15 , wherein the simultaneously forming the metal layer and the metal silicide layer, the removing the metal layer, and the forming the metal nitride layer are performed in a same process chamber.