IP Library › Granted Patent US 10,475,751
Granted Patent B2
US 10,475,751 · App. 16/120,150 · Granted Nov 12, 2019

Fan-out semiconductor package

Inventors: Seong Hee Choi (Suwon-Si, KR); Han Kim (Suwon-Si, KR); Hyung Joon Kim (Suwon-Si, KR); Mi Ja Han (Suwon-Si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01L23/552H01L21/4853H01L21/4857H01L21/565H01L21/6835H01L23/3107H01L23/5383H01L23/5386H01L23/5389H01L24/19H01L24/20H01L2221/68372H01L2224/18H01L2224/214H01L2924/3025
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Quick Facts
Patent No.
US 10,475,751
App. No.
16/120,150
Granted
Nov 12, 2019
Kind
B2
Abstract

A fan-out semiconductor package includes: a core member having at least one through-hole formed therein and having a metal layer disposed on an internal surface thereof; an electronic component disposed in the through-hole; an encapsulant encapsulating the core member and the electronic component; a metal plate disposed on an upper surface of the encapsulant; and a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other. The wall includes sections spaced apart from each other.

Claims (26)

1. A fan-out semiconductor package comprising:

a core member having at least one through-hole formed therein and having a metal layer disposed on at least a portion of an upper surface thereof;

an electronic component disposed in the through-hole;

an encapsulant encapsulating the core member and the electronic component;

a metal plate disposed on an upper surface of the encapsulant; and

a wall penetrating the encapsulant to connect the metal layer and the metal plate to each other,

wherein the wall including sections spaced apart from each other.

2. The fan-out semiconductor package of claim 1 , wherein the wall is made of a metal.

3. The fan-out semiconductor package of claim 1 , wherein the metal layer is disposed on at least a portion of the core member, and the wall extends from the metal layer disposed on the upper surface of the core member.

4. The fan-out semiconductor package of claim 1 , wherein the wall extends from a lower surface of the metal plate, and is connected to the metal layer disposed on the upper surface of the core member.

5. The fan-out semiconductor package of claim 1 , wherein the wall includes a first wall extending from a lower surface of the metal plate and a second wall extending from an upper surface of the metal layer of the core member.

6. The fan-out semiconductor package of claim 5 , wherein the first wall and the second wall are bonded to each other.

7. The fan-out semiconductor package of claim 1 , wherein the wall has a zigzag shape.

8. The fan-out semiconductor package of claim 1 , wherein the core member includes an insulator layer made of an insulating material and the metal layer disposed on an internal surface of the insulator layer and portions of an upper surface and a lower surface of the insulator layer.

9. The fan-out semiconductor package of claim 1 , wherein the core member includes an outer wall portion disposed at an edge of the fan-out semiconductor package and an inner wall portion disposed inside the outer wall portion.

10. The fan-out semiconductor package of claim 9 , wherein the wall disposed on the outer wall portion has a width greater than that of the wall disposed on the inner wall portion.

11. The fan-out semiconductor package of claim 1 , wherein the electronic component includes a semiconductor chip disposed in the through-hole and a passive component spaced apart from the semiconductor chip.

12. A fan-out semiconductor package comprising:

a core member having at least one through-hole formed therein and having a metal layer disposed on at least a portion of an upper surface thereof;

an electronic component disposed in the through-hole;

an encapsulant encapsulating the core member and the electronic component;

a metal plate disposed on an upper surface of the encapsulant;

a first wall extending from the metal layer disposed on the upper surface of the core member; and

a second wall extending from a lower surface of the metal plate,

wherein the first wall and the second wall are offset from each other.

13. The fan-out semiconductor package of claim 12 , wherein at least one of first and second walls includes sections spaced apart from each other.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2018
From: CHOI, SEONG HEE; KIM, HAN; KIM, HYUNG JOON; HAN, MI JA
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 046771/0646 →
Priority Claims (1)
KR 10-2018-0012039 · Jan 31, 2018 · national
Continuity (1)
Related Publication 20190237406A1 · Aug 1, 2019