IP Library › Granted Patent US 10,475,780
Granted Patent B2
US 10,475,780 · App. 15/703,995 · Granted Nov 12, 2019

Level shifter spare cell

Inventors: Zhe Ge (Suzhou, CN); Miaolin Tan (Suzhou, CN); Peidong Wang (Suzhou, CN)
Assignee: NXP USA, Inc.
H01L27/0207G06F17/5054G06F17/5072G11C7/1051G11C7/1057G11C7/1084G11C29/82
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Quick Facts
Patent No.
US 10,475,780
App. No.
15/703,995
Granted
Nov 12, 2019
Kind
B2
Abstract

A method for configuring level shifter spare cells includes providing a power rail connectable to a corresponding power domain, and providing a spare cell including a level shifter circuit. The level shifter circuit has first and second terminals that are connectable to the power rail, and the first and second terminals are floating with respect to the power rail.

Claims (18)

1. An integrated circuit, comprising:

at least one power rail connectable to a corresponding power domain, wherein the power domain has a power level; and

at least one spare cell comprising a level shifter circuit, wherein the level shifter circuit has first and second terminals that are connectable to the at least one power rail,

wherein the first and second terminals of the level shifter circuit are floating with respect to the at least one power rail.

2. The apparatus of claim 1 , wherein the first and second terminals of the level shifter circuit are in a different layer from a layer of the at least one power rail.

3. The apparatus of claim 2 , further comprising:

a first via for coupling the first terminal of the level shifter circuit with the at least one power rail; and

a second via for coupling the second terminal of the level shifter circuit with the at least one power rail or another one of the at least one power rails.

4. The apparatus of claim 1 , wherein a number of the spare cells is less than n*(n−1), wherein n is a number of the power domains.

5. The apparatus of claim 1 , wherein the at least one power rail extends in a first direction, and the first and second terminals of the level shifter circuit extend in a second direction that is at an angle with respect to the first direction.

6. The apparatus of claim 5 , wherein the first and second terminals of the level shifter circuit are perpendicular to the at least one power rail.

7. The apparatus of claim 1 , wherein the first and second terminals of the level shifter circuit are connectable to a same power rail through first and second vias such that the level shifter circuit operates as a buffer circuit.

8. An integrated circuit having a plurality of power domains, comprising:

multiple power rails each coupled with a corresponding one of the power domains and each having a corresponding power level; and

multiple spare cells each comprising a level shifter circuit that can be coupled to one of the power rails at a first terminal, and to another of the power rails at a second terminal,

wherein at least one of the power rails cannot be coupled to another power rail by way of the spare cells.

9. The integrated circuit of claim 8 , wherein the first and second terminals of the level shifter circuit are floating with respect to the multiple power rails.

10. The integrated circuit of claim 8 , wherein the first and second terminals are formed in a different layer from a layer of the multiple power rails, and the integrated circuit further comprises multiple vias that can be coupled to the first and second terminals and to the multiple power rails.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2017
From: GE, ZHE; TAN, MIAOLIN; WANG, PEIDONG
To: NXP USA,INC.
Reel/Frame 043581/0366 →
Priority Claims (1)
CN 2017 1 0777355 · Aug 31, 2017 · national
Continuity (1)
Related Publication 20190067263A1 · Feb 28, 2019