Pixel circuit, display device, display apparatus and driving method
Embodiments of the present disclosure relate to a pixel circuit, comprising: a liquid crystal capacitor; a selection unit having a first input terminal for receiving a row control signal and a second input terminal for receiving a column control signal, and configured to generate a selection signal indicating whether to select the liquid crystal capacitor according to the row control signal and the column control signal and output the selection signal via an output terminal of the selection unit; and a grayscale voltage writing unit having a first input terminal connected to the output terminal of the selection unit, a second input terminal for receiving a grayscale voltage, a first output terminal connected to a first terminal of the liquid crystal capacitor, and a second output terminal connected to a first voltage, and configured to write a corresponding grayscale voltage of multiple grayscale voltages into the liquid crystal capacitor when the selection signal indicates that the liquid crystal capacitor is selected.
1. A pixel circuit, comprising:
a liquid crystal capacitor;
a selection unit having a first input terminal for receiving a row control signal and a second input terminal for receiving a column control signal, and configured to generate a selection signal indicating whether to select the liquid crystal capacitor according to both the row control signal and the column control signal, and to output the selection signal via an output terminal of the selection unit; and
a grayscale voltage writing unit having a first input terminal connected to the output terminal of the selection unit, a second input terminal for receiving multiple grayscale voltages, a first output terminal connected to a first terminal of the liquid crystal capacitor, and a second output terminal connected to a first voltage, and configured to write a corresponding grayscale voltage of the multiple grayscale voltages into the liquid crystal capacitor when the selection signal indicates that the liquid crystal capacitor is selected.
2. The pixel circuit according to claim 1 , wherein a lowest grayscale voltage among the multiple grayscale voltages has a magnitude of 0, and a highest grayscale voltage among the multiple grayscale voltages has a magnitude corresponding to a highest gray level of an image to be displayed.
3. The pixel circuit according to claim 1 , wherein the column control signal depends on a gray level of an image to be displayed.
4. The pixel circuit according to claim 1 , wherein the grayscale voltage writing unit comprises a writing module and a reset module, wherein
the writing module has a control terminal connected to the output terminal of the selection unit, an input terminal for receiving the corresponding grayscale voltage, and an output terminal connected to the first terminal of the liquid crystal capacitor; and
the reset module has an input terminal for receiving a reset voltage, and an output terminal connected to the writing module, and is configured to reset the writing module under the control of the reset voltage.
5. The pixel circuit according to claim 1 , wherein the selection unit comprises a first thin film transistor (TFT) and a second TFT, wherein the first TFT has a control terminal and an input terminal both connected to the row control signal, and an output terminal connected to an input terminal of the second TFT, and the second TFT has a control terminal connected to the column control signal, and an output terminal connected to the first input terminal of the grayscale voltage writing unit for outputting the selection signal.
6. The pixel circuit according to claim 4 , wherein:
the writing module comprises a third TFT having a control terminal connected to the output terminal of the second TFT, an input terminal for receiving the corresponding grayscale voltage, and an output terminal connected to the first terminal of the liquid crystal capacitor;
a second terminal of the liquid crystal capacitor is connected to a second voltage;
the reset module comprises a fourth TFT and a first capacitor, wherein the fourth TFT has a control terminal for receiving the reset voltage, an input terminal connected to both the first terminal of the first capacitor and the output terminal of the second TFT, and an output terminal connected to the first voltage; and
a second terminal of the first capacitor is connected to both the first terminal of the liquid crystal capacitor and the output terminal of the third TFT.
7. A display device, comprising at least two pixel circuits according to claim 1 .
8. A display apparatus comprising a timing controller and the display device according to claim 7 , wherein the timing controller generates the column control signal according to an amplitude order of the grayscale voltages to be written to the liquid crystal capacitors of the pixel circuits of the display device.
9. A method for driving the pixel circuit according to claim 1 , comprising:
in a selection phase, generating the selection signal according to the row control signal and the column control signal;
in a grayscale voltage writing phase, writing a corresponding grayscale voltage of multiple grayscale voltages to the liquid crystal capacitor if the selection signal indicates that the liquid crystal capacitor is selected, otherwise, not writing the corresponding grayscale voltage to the liquid crystal capacitor; and
in a reset phase, resetting the grayscale voltage writing unit.
10. The method according to claim 9 , wherein the selection unit comprises a first TFT and a second TFT, and the grayscale voltage writing unit comprises a third TFT, a fourth TFT and a first capacitor, wherein:
in the selection phase, the first TFT is turned on, and the second TFT is turned on, so that the selection signal indicating that the liquid crystal capacitor is selected is generated;
in the grayscale voltage writing phase, the third TFT is turned on due to the selection signal, so that the corresponding grayscale voltage is written into the liquid crystal capacitor; and
in the reset phase, when a reset voltage is applied to the fourth TFT, the fourth TFT is turned on to cause the first capacitor to discharge, so that the third TFT is turned off,
wherein the reset voltage is applied each time the corresponding grayscale voltage changes.
11. The method according to claim 9 , wherein the selection unit comprises a first TFT and a second TFT, and the grayscale voltage writing unit comprises a third TFT, a fourth TFT and a first capacitor, wherein:
in the selection phase, the first TFT is turned on, and the second TFT is turned off, so that the selection signal indicating that the liquid crystal capacitor is not selected is generated;
in the grayscale voltage writing phase, the third TFT is turned off due to the selection signal, so that the corresponding grayscale voltage is not written into the liquid crystal capacitor; and
in the reset phase, when a reset voltage is applied to the fourth TFT, the fourth TFT is turned on to cause the first capacitor to discharge, so that the third TFT is turned off,
wherein the reset voltage is applied each time the corresponding grayscale voltage changes.
12. A method for driving the display device according to claim 7 , comprising:
sequentially providing the multiple grayscale voltages to the second input terminals of the grayscale voltage writing units of the pixel circuits according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device,
wherein amplitudes of the multiple grayscale voltages are in one-to-one correspondence with all gray levels of the image to be displayed, and all the multiple grayscale voltages are written sequentially in a frame period.
13. A display device, comprising at least two pixel circuits according to claim 4 .
14. A display device, comprising at least two pixel circuits according to claim 5 .
15. A display device, comprising at least two pixel circuits according to claim 6 .
16. A display apparatus comprising a timing controller and the display device according to claim 13 , wherein the timing controller generates the column control signal according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device.
17. A display apparatus comprising a timing controller and the display device according to claim 14 , wherein the timing controller generates the column control signal according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device.
18. A display apparatus comprising a timing controller and the display device according to claim 15 , wherein the timing controller generates the column control signal according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device.
19. A method for driving the display device according to claim 13 , comprising:
sequentially providing the multiple grayscale voltages to the second input terminals of the grayscale voltage writing units of the pixel circuits according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device,
wherein amplitudes of the multiple grayscale voltages are in one-to-one correspondence with all gray levels of the image to be displayed, and all the multiple grayscale voltages are written sequentially in a frame period.
20. A method for driving the display device according to claim 14 , comprising:
sequentially providing the multiple grayscale voltages to the second input terminals of the grayscale voltage writing units of the pixel circuits according to an amplitude order of the grayscale voltages to be written into the liquid crystal capacitors of the pixel circuits of the display device,
wherein amplitudes of the multiple grayscale voltages are in one-to-one correspondence with all gray levels of the image to be displayed, and all the multiple grayscale voltages are written sequentially in a frame period.