IP Library Granted Patent US 10,483,415
Granted Patent B2
US 10,483,415 · App. 15/904,296 · Granted Nov 19, 2019

Methods to introduce sub-micrometer, symmetry-breaking surface corrugation to silicon substrates to increase light trapping

Inventors: Sang Eon Han (Albuquerque, NM); Brittany R. Hoard (Albuquerque, NM); Sang M. Han (Albuquerque, NM); Swapnadip Ghosh (Albuquerque, NM)
Assignee: STC.UNM
H01L31/02363G02B1/005H01L31/0747H01L31/1804H01L31/202H01L31/208H03H9/10H03H9/145H03H9/25Y02E10/547Y02P70/521
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Quick Facts
Patent No.
US 10,483,415
App. No.
15/904,296
Granted
Nov 19, 2019
Kind
B2
Abstract

Provided is a method for fabricating a nanopatterned surface. The method includes forming a mask on a substrate, patterning the substrate to include a plurality of symmetry-breaking surface corrugations, and removing the mask. The mask includes a pattern defined by mask material portions that cover first surface portions of the substrate and a plurality of mask space portions that expose second surface portions of the substrate, wherein the plurality of mask space portions are arranged in a lattice arrangement having a row and column, and the row is not oriented parallel to a [110] direction of the substrate. The patterning the substrate includes anisotropically removing portions of the substrate exposed by the plurality of spaces.

Claims (14)

1. An optoelectronic device, comprising:

a patterned substrate comprising a surface having a plurality of symmetry-breaking surface corrugations, wherein the symmetry-breaking surface corrugations comprise a symmetry selected from at least one of C 4 , C 2v , C 2 and C 1 wherein the symmetry breaking corrugations comprise a periodicity from 500 nm to 1000 nm in at least two directions; and

at least one layer formed on the patterned substrate.

2. The optoelectronic device of claim 1 , wherein the at least one layer comprises one or more selected from the group consisting of a metal, a polymer, and a semiconductor.

3. The optoelectronic device of claim 2 , wherein the semiconductor comprises one or more selected from the group consisting of an inorganic semiconductor and an organic semiconductor.

4. The optoelectronic device of claim 3 , wherein the inorganic semiconductor comprises amorphous silicon (a-Si).

5. The optoelectronic device of claim 1 , wherein the plurality of symmetry-breaking surface corrugations defines an array of inverted nanopyramids.

6. The optoelectronic device of claim 5 , wherein the surface comprises flat, unetched areas between the inverted nanopyramids.

7. The optoelectronic device of claim 1 , wherein the silicon substrate comprises c-Si.

8. The optoelectronic device of claim 1 , wherein the plurality of symmetry-breaking surface corrugations defines an array of pyramidal protrusions.

9. The optoelectronic device of claim 1 , wherein the plurality symmetry-breaking surface corrugations have C 2 symmetry.

10. The optoelectronic device of claim 1 , wherein the at least one layer is conformally disposed on the plurality of symmetry-breaking surface corrugations.

11. The optoelectronic device of claim 1 , wherein the at least one layer comprises a polymer layer, a transparent conducting oxide layer, or an amorphous silicon (a-Si) layer conformally disposed on the plurality of symmetry-breaking surface corrugations.

12. The optoelectronic device of claim 1 , wherein the at least one layer comprises a plurality of layers, the plurality of layers comprising a front contact layer, a back contact layer and an active layer disposed between front and back contact layers.

Continuity (5)
Continuation 15389936 · Dec 23, 2016
Continuation 15030039
Provisional Application 61892950 · Oct 18, 2013
Provisional Application 62065081 · Oct 17, 2014
Related Publication 20180190841A1 · Jul 5, 2018
Cited By (1)
US 12,402,437