IP Library › Granted Patent US 10,488,879
Granted Patent B2
US 10,488,879 · App. 15/915,114 · Granted Nov 26, 2019

Device and method for performing maximum power point tracking for photovoltaic devices in presence of hysteresis

Inventors: Norman Pellet (Morges, CH); Fabrizio Giordano (Saint-Sulpice, CH); Shaik Mohammed Zakeeruddin (Bussigny, CH); Michael Grätzel (Saint-Sulpice, CH)
Assignee: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
G05F1/67H01G9/2022H01L31/028H01L31/0322H01L31/0687H02S20/32H02S40/30
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Quick Facts
Patent No.
US 10,488,879
App. No.
15/915,114
Granted
Nov 26, 2019
Kind
B2
Abstract

A photovoltaic system including a solar cell having a hysteretic behavior; and a power device configured to extract a maximum power from the solar cell by forcing power oscillations of the power output by the solar cell.

Claims (13)

1. A method for tracking a maximum power output of a solar cell in presence of hysteresis, comprising the steps of:

sampling a voltage and a current of the solar cell (V(k), I(k));

determining a voltage variation and a current variation by substracting respectively from the sampled voltage a value of a previously sampled voltage (V(k)−V(k−1)) and from the sample current a previously sampled current (I(k)−I(k−1));

comparing respectively the voltage variation and the current variation to a determined typical system noise value and rejecting the sampled voltage value and the sampled current as non-significant if the comparing shows that the voltage variation and the current variation are inferior to the determined typical system noise value;

computing the power for the sampled voltage and current;

comparing the computed power to the previously computed power for previously sampled voltage and current;

incrementing the voltage by sign(dV)·ΔV DAC if the computed power is greater than the previously computed power;

incrementing the voltage by sign(dV)·ΔV DAC if the computed power is not greater than the previously computed power and the dV is positive and the relative decrement of power is smaller of the forward power threshold efw;

incrementing the voltage by sign(dV)·ΔV DAC if the computed power is not greater than the previously computed power and the dV is negative and the relative decrement of power is smaller of the backward power threshold ebw;

incrementing the voltage by −sign(dV)·ΔV DAC if the computed power is not greater than the previously computed power and the dV is positive and the relative decrement of power is bigger of the forward power threshold efw; and

incrementing the voltage by −sign(dV)·ΔV DAC if the computed power is not greater than the previously computed power and the dV is negative and the relative decrement of power is bigger of the backward power threshold ebw.

2. The method according to claim 1 , wherein the determined typical noise value of the system is about 1% of the current or voltage at maximum power point.

3. The method according to claim 1 , wherein the selected forward power threshold efw and the backward power threshold ebw are in the range between 0.2% and 20% for both parameters.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2019
From: PELLET, NORMAN; GIORDANO, FABRIZIO; ZAKEERUDDIN, SHAIK MOHAMMED; GRÄTZEL, MICHAEL
To: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
Reel/Frame 050783/0108 →
Continuity (2)
Provisional Application 62468983 · Mar 9, 2017
Related Publication 20180259990A1 · Sep 13, 2018