IP Library › Granted Patent US 10,491,718
Granted Patent B2
US 10,491,718 · App. 15/598,041 · Granted Nov 26, 2019

Method and apparatus for processing packets in a network device

Inventors: Carmi Arad (Nofit, IL); Ilan Mayer-Wolf (Tel-Aviv, IL); Rami Zemach (Givat Shapira, IL); David Melman (Halutz, IL); Ilan Yerushalmi (Hod Hasharon, IL); Tal Mizrahi (Haifa, IL); Lior Valency (Ganey Tikva, IL)
Assignee: Marvell Israel (M.I.S.L) Ltd.
H04L69/22H04L49/253H04L69/12H04L69/161
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Quick Facts
Patent No.
US 10,491,718
App. No.
15/598,041
Granted
Nov 26, 2019
Kind
B2
Abstract

A packet received by a network device via a network. A first portion of the packet is stored in a packet memory, the first portion including at least a payload of the packet. The packet is processed based on information from a header of the packet. After the packet is processed, a second portion of the packet is stored in the packet memory, the second portion including at least a portion of the header of the packet. When the packet is to be transmitted the first portion of the packet and the second portion of the packet are retrieved from the packet memory, and the first portion and the second portion are combined to generate a transmit packet. The transmit packet is forwarded to a port of the network device for transmission of the transmit packet via port of the network device

Claims (59)

1. A method for processing packets in a network device, the method comprising:

receiving, at a receive processor of the network device, a packet received by the network device via a network;

writing, with the receive processor, a first portion of the packet to a packet memory separate from a packet processing pipeline configured to perform processing of the packet, the first portion of the packet including at least a payload of the packet;

providing, with the receive processor, a second portion of the packet to the packet processing pipeline, the second portion of the packet i) including information from a header of the packet and ii) being provided to the packet processing pipeline without having been written to any memory separate from the packet processing pipeline;

processing, with the packet processing pipeline, the packet based on information from the second portion of the packet;

only after processing the packet based on the information from the second portion of the packet, writing, with the packet processing pipeline, the second portion of the packet to the packet memory;

when the packet is to be transmitted, retrieving, with a transmit processor of the network device from the packet memory, the first portion of the packet and the second portion of the packet;

combining, with the transmit processor, the first portion of the packet and the second portion of the packet retrieved from the packet memory to generate a transmit packet; and

forwarding, with the transmit processor, the transmit packet to a port of the network device for transmission of the transmit packet via port of the network device.

2. The method of claim 1 , further comprising, prior to writing the second portion of the packet to the packet memory, generating, based on a result of processing of the packet, a modified header, wherein writing the second portion of the packet to the packet memory comprises writing at least the modified header to the packet memory.

3. The method of claim 2 , wherein generating the modified header includes modifying the header of the packet using one or more configurable header alteration operations.

4. The method of claim 1 , wherein:

writing the first portion of the packet to the packet memory comprises writing the first portion of the packet at a first memory location in the packet memory; and

writing the second portion of the packet to the packet memory comprises writing the second portion at a second memory location in the packet memory, the second memory location being separate from the first memory location.

5. The method of claim 4 , wherein retrieving, from the packet memory, the first portion of the packet and the second portion of the packet comprises:

retrieving the first portion of the packet from the first memory location in the packet memory using information that indicates the first memory location in the packet memory, and

retrieving the second portion of the packet from the second memory location in the packet memory using information that indicates the second memory location in the packet memory.

6. The method of claim 1 , wherein processing the packet includes processing the packet using a first packet descriptor associated with the packet, wherein the first packet descriptor includes the information from the second portion of the packet, and wherein the method further comprises, after writing the second portion of the packet to the packet memory, generating, with the packet processing pipeline, a second packet descriptor associated with the packet, the second packet descriptor omitting at least some of the information from the second portion of the packet.

7. The method of claim 6 , wherein

generating the second packet descriptor includes generating the second packet descriptor to include memory location information that links the first portion of the packet in the packet memory and the second portion of the packet in the packet memory, and

wherein retrieving, from the packet memory, the first portion of the packet and the second portion of the packet comprising retrieving the first portion of the packet and the second portion of the packet using the memory location information.

8. The method of claim 7 , wherein generating the second packet descriptor to include the memory location information comprises generating the second packet descriptor to include first information that indicates a first memory location at which the first portion of the packet is written in the packet memory and second information that indicates a second memory location at which the second portion is written in the packet memory.

9. The method of claim 6 , wherein generating the second packet descriptor comprises generating the second packet descriptor that is shorter than the first packet descriptor.

10. The method of claim 6 , further comprising enqueueing with the packet processing pipeline, the second packet descriptor in a transmit queue for subsequent transmission of the packet.

11. The method of claim 10 , further comprising receiving the first packet descriptor at the packet processing pipeline via a first communication bus, and wherein enqueueing the second packet descriptor in the transmit queue includes providing the second packet descriptor to the transmit queue via a second communication bus that is narrower than the first communication bus.

12. A network device, comprising:

a receive processor configured to

receive a packet that was received via a network link,

write only a first portion of the packet to a packet memory separate from a packet processing pipeline configured to perform processing of the packet, the first portion of the packet including at least a payload of the packet, and

provide a second portion of the packet to the packet processing pipeline, the second portion of the packet i) including information from a header of the packet and ii) being provided to the packet processing pipeline without having been written to any memory separate from the packet processing pipeline, wherein

the packet processing pipeline is configured to

process the packet based on information from the second portion of the packet, and

only after processing the packet based on the information from the second portion of the packet, write the second portion of the packet to the packet memory; and

a transmit processor configured to

when the packet is to be transmitted, retrieve, from the packet memory, the first portion of the packet and the second portion of the packet,

combine the first portion of the packet and the second portion of the packet retrieved from the packet memory to generate a transmit packet, and

forward the transmit packet to a port of the network device for transmission of the transmit packet via the port of the network device.

13. The network device of claim 12 , wherein the packet processing pipeline is further configured to, prior to writing the second portion of the packet to the packet memory, generate, based on a result of processing of the packet, a modified header, wherein writing the second portion of the packet to the packet memory comprises writing at least the modified header to the packet memory.

14. The network device of claim 12 , wherein the packet processing pipeline includes a programmable header alteration engine configured to execute one or more configurable header alteration operations as part of generating the modified header.

15. The network device of claim 12 , wherein

the receive processor is configured to write the first portion of the packet at a first memory location in the packet memory; and

the packet processing pipeline is configured to write the second portion of the packet at a second memory location in the packet memory, the second memory location being separate from the first memory location.

16. The network device of claim 14 , wherein the transmit processor is configured to

retrieve the first portion of the packet from the first memory location in the packet memory using information that indicates the first memory location in the packet memory, and

retrieve the second portion of the packet from the second memory location in the packet memory using information that indicates the second memory location in the packet memory.

17. The network device of claim 12 , wherein the packet processing pipeline is configured to

process the packet using a first packet descriptor associated with the packet, wherein the first packet descriptor includes the information from the second portion of the packet, and

after writing the second portion of the packet to the packet memory, generate a second packet descriptor, the second packet descriptor omitting at least some of the information from the second portion of the packet.

18. The network device of claim 17 , wherein

the packet processing pipeline is configured to generate the second packet descriptor to include memory location information that links the first portion of the packet in the packet memory and the second portion of the packet in the packet memory, and

the transmit processor is configured to

receive the second packet descriptor, and

retrieve, from the packet memory, the first portion of the packet and the second portion of the packet from the packet memory using the memory location information included in the second packet descriptor.

19. The network device of claim 18 , wherein the packet processing pipeline is configured to generate the second packet descriptor to include the memory location information by generating the second packet descriptor to include first information that indicates a first memory location at which the first portion of the packet is written in the packet memory and second information that indicates a second memory location at which the second portion is written in the packet memory.

20. The network device of claim 18 , wherein the packet processing pipeline is configured to generate the second packet to be shorter than the first packet descriptor.

21. The network device of claim 18 , wherein the packet processing pipeline is further configured to enqueue the second packet descriptor in a transmit queue for subsequent transmission of the packet via a corresponding port of the network device.

22. The network device of claim 21 , further comprising

a first communication bus configured to provide the first packet descriptor to the packet processing pipeline, and

a second communication bus configured to provide the second packet descriptor to the transmit queue, wherein the second communication bus is narrower than the first communication bus.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2019
From: ARAD, CARMI; MAYER-WOLF, ILAN; ZEMACH, RAMI; MELMAN, DAVID; YERUSHALMI, ILAN; MIZRAHI, TAL; VALENCY, LIOR
To: MARVELL ISRAEL (M.I.S.L) LTD
Reel/Frame 050672/0183 →
Continuity (2)
Provisional Application 62338340 · May 18, 2016
Related Publication 20170339259A1 · Nov 23, 2017
Cited By (1)
US 12,463,922