IP Library › Granted Patent US 10,498,214
Granted Patent B2
US 10,498,214 · App. 16/114,005 · Granted Dec 3, 2019

Multi-stage amplifier

Inventors: Seenu Gopalraju (San Jose, CA); Rhys Philbrick (San Jose, CA); Ruchi Parikh (Mountain View, CA)
Assignee: Renesas Electronics America Inc.
H02M1/08H02M3/158H02M2001/0032Y02B70/16
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,498,214
App. No.
16/114,005
Granted
Dec 3, 2019
Kind
B2
Abstract

In an embodiment, an amplifier includes first, second, and third stages, and a feedback network. The first stage has a first passband and is configured to generate a first output signal in response to first and second input signals, and the second stage has a second passband that is higher in frequency than the first passband and is configured to generate a second output signal in response to third and fourth input signals. The third stage has a first input node coupled to receive the first output signal, a second input node coupled to receive the second output signal, and an output node. And the feedback network is coupled between the second input node and the output node of the third stage. For example, where the first, second, and third stages are respective operational-transconductance-amplifier stages, such an amplifier may be suitable for low-power applications.

Claims (29)

1. A controller for controlling the supply of a regulated output voltage based on an input voltage, the controller comprising:

an input node configured to receive the input voltage;

an output node configured to be coupled to the regulated output voltage; and

an error amplifier coupled between the input node and the output node, the error amplifier including an integrator configured to provide a first passband for a first difference signal, a differentiator configured to provide a second passband for a second difference signal, and a combiner circuit that combines outputs of the integrator and the differentiator, wherein at least one of the integrator, the differentiator and the combiner include an operational transconductance amplifier.

2. The controller of claim 1 , wherein the error amplifier further comprises a feedback network coupled between the output of the differentiator and an output of the combiner.

3. The controller of claim 2 , wherein the combiner is configured to generate an error signal in response to the f outputs of the integrator and the differentiator.

4. The controller of claim 2 wherein the feedback network includes:

a resistor coupled between the output of the differentiator and the output of the combiner; and

a capacitor coupled in parallel with the resistor.

5. A controller for controlling the supply of a regulated output voltage based on an input voltage, the controller comprising:

an input node configured to receive the input voltage;

an output node configured to be coupled to the regulated output voltage; and

an error amplifier coupled between the input node and the output node, the error amplifier including an integrator configured to provide a first passband for a first difference signal, a differentiator configured to provide a second passband for a second difference signal, and a combiner circuit that combines outputs of the integrator and the differentiator, wherein at least one of the integrator, the differentiator and the combiner include an operational transconductance amplifier,

wherein the first difference signal is derived from the output node.

6. The controller of claim 2 , further comprising an offset compensation stage coupled to the feedback network and to the differentiator and configured to reduce a signal offset of the differentiator.

7. The controller of claim 2 , further comprising an offset compensation stage coupled to the feedback network and to the differentiator and configured to reduce an input offset of the differentiator.

8. The controller of claim 1 , further comprising an offset compensation stage coupled to the feedback network and to the differentiator and configured to reduce an input voltage offset of the differentiator.

9. The controller of claim 1 , wherein the second passband is higher in frequency than the first passband.

10. The controller of claim 1 , further comprising switching logic coupled to receive an output of the combiner and to control a duty cycle of the controller based thereon.

11. The controller of claim 10 , wherein the switching logic includes:

a comparator having a first node coupled to the combiner output, having a second node coupled to receive a sawtooth signal, and having a comparator output node; and

a drive circuit having an input node coupled to the comparator output node and having an output node configured to be coupled to an inductor.

12. The controller of claim 10 , wherein the controller is implemented in an integrated circuit.

13. A method for controlling the supply of a regulated output voltage based on an input voltage, the method comprising:

receiving the input voltage;

receiving a signal related to the regulated output voltage;

low-pass filtering a first difference signal to produce a first output, the first difference signal being generated based on the signal related to the regulated output voltage;

high-pass filtering a second difference signal to produce a second output; and

combining the first and second outputs to produce a compensation signal, wherein the compensation signal is used to control the supply of the regulated output voltage.

Continuity (3)
Continuation 14741867 · Jun 17, 2015
Provisional Application 62052565 · Sep 19, 2014
Related Publication 20180367022A1 · Dec 20, 2018
Cited By (1)
US 12,683,627