IP Library › Granted Patent US 10,504,408
Granted Patent B2
US 10,504,408 · App. 15/682,740 · Granted Dec 10, 2019

Partition-based gate driving method and apparatus and gate driving unit

Inventors: Mingfu Han (Beijing, CN); Guangliang Shang (Beijing, CN); Han-Seung- Woo (Beijing, CN); Xing Yao (Beijing, CN); Zhihe Jin (Beijing, CN); Haoliang Zheng (Beijing, CN); Lijun Yuan (Beijing, CN); Zhichong Wang (Beijing, CN)
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
G09G3/2085G09G3/3677G09G2300/0408G09G2310/0286G09G2310/04G09G2310/08G09G2330/021
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Quick Facts
Patent No.
US 10,504,408
App. No.
15/682,740
Granted
Dec 10, 2019
Kind
B2
Abstract

The embodiments of the present disclosure provide a partition-based gate driving method and apparatus and a gate driving unit, and relates to the field of display technology. In the embodiments of the present disclosure, the partition-based gate driving method comprises: generating a control signal according to an acquired human eye observation partition; generating a second clock signal or a third clock signal according to the control signal; and controlling a second output signal according to the second clock signal or controlling a third output signal according to the third clock signal, thereby controlling the display area to be displayed by partitions.

Claims (38)

1. A partition-based gate driving method, comprising:

generating a control signal according to an acquired human eye observation partition;

generating a second clock signal or a third clock signal according to the control signal; and

controlling a second output signal according to the second clock signal or controlling a third output signal according to the third clock signal, thereby controlling refresh rates of a corresponding human eye observation partition and a corresponding non-human eye observation partition in a display area, respectively,

wherein the second clock signal has a frequency different from that of the third clock signal.

2. The method according to claim 1 , wherein controlling a second output signal according to the second clock signal or controlling a third output signal according to the third clock signal thereby controlling refresh rates of a corresponding human eye observation partition and a corresponding non-human eye observation partition in a display area respectively comprises:

controlling partitions in the display area corresponding to the second output signal or the third output signal to be refreshed when the second output signal or the third output signal is output at a high level, and controlling partitions in the display area corresponding to the second output signal or the third output signal not to be refreshed when the second output signal or the third output signal is output at a low level.

3. A partition-based gate driving apparatus, comprising:

a control signal generation module configured to generate a control signal according to an acquired human eye observation partition;

a clock signal generation module configured to generate a second clock signal or a third clock signal according to the control signal; and

a partition display control module configured to control a second output signal according to the second clock signal or control a third output signal according to the third clock signal, thereby controlling refresh rates of a corresponding human eye observation partition and a corresponding non-human eye observation partition in a display area, respectively.

4. The apparatus according to claim 3 , wherein the partition display control module comprises:

a display area control module configured to control partitions in the display area corresponding to the second output signal or the third output signal to be refreshed when the second output signal or the third output signal is output at a high level, and configured to control partitions in the display area corresponding to the second output signal or the third output signal not to be refreshed when the second output signal or the third output signal is output at a low level.

5. A gate driving unit, comprising:

a shift unit configured to control a first output signal thereof under the control of a shift pulse input from a first input signal terminal; and

a partition unit configured to receive the first output signal from the shift unit as a second input signal of the partition unit, and the partition unit further configured to control a second output signal of the partition unit under the control of a second clock signal or control a third output signal of the partition unit under the control of a third clock signal, thereby controlling refresh rates of a corresponding human eye observation partition and a corresponding non-human eye observation partition in a display area, respectively.

6. The gate driving unit according to claim 5 , wherein the partition unit comprises a second input module, a second pull-up node reset module, a second reset module, a second output module, a third output module, a second de-noising module, and a third de-noising module,

wherein the second input module is connected to a first output signal terminal of the shift unit and a second pull-up node, respectively, and is configured to pull up a potential at the second pull-up node under the control of a first output signal from the first output signal terminal;

wherein the second pull-up node reset module is connected to the second pull-up node and a second pull-down signal terminal, respectively, and is configured to control the potential at the second pull-up node under the control of a second pull-down signal provided by the second pull-down signal terminal;

wherein the second reset module is connected to a second reset signal terminal and the second pull-up node, respectively, and is configured to reset the potential at the second pull-up node under the control of a second reset signal provided by the second reset signal terminal;

wherein the second output module is connected to the second pull-up node, a second clock signal terminal, and a second output signal terminal, respectively, and is configured to control a second output signal at the second output signal terminal under the control of the second pull-up node and a second clock signal;

wherein the third output module is connected to the second pull-up node, a third clock signal terminal, and a third output signal terminal, respectively, and is configured to control a third output signal at the third output signal terminal under the control of the second pull-up node and a third clock signal;

wherein the second de-noising module is connected to the second output signal terminal and the second pull-down signal terminal, respectively, and is configured to de-noise the second output signal at the second output signal terminal under the control of the second pull-down signal provided by the second pull-down signal terminal; and

wherein the third de-noising module is connected to the third output signal terminal and the second pull-down signal terminal, respectively, and is configured to de-noise the third output signal at the third output signal terminal under the control of the second pull-down signal provided by the second pull-down signal terminal.

7. The gate driving unit according to claim 6 , wherein the second input module comprises a ninth transistor having a control terminal connected to the first output signal terminal, an input terminal connected to a power supply terminal, and an output terminal connected to the second pull-up node.

8. The gate driving unit according to claim 6 , wherein the second pull-up node reset module comprises an eleventh transistor having a control terminal connected to the second pull-down signal terminal, an input terminal connected to the second pull-up node, and an output terminal connected to a low level terminal.

9. The gate driving unit according to claim 6 , wherein the second reset module comprises a tenth transistor having a control terminal connected to the second reset signal terminal, an input terminal connected to the second pull-up node, and an output terminal connected to a low level terminal.

10. The gate driving unit according to claim 6 , wherein the second output module comprises a fifth transistor having a control terminal connected to the second pull-up node, an input terminal connected to the second clock signal terminal, and an output terminal connected to the second output signal terminal.

11. The gate driving unit according to claim 6 , wherein the third output module comprises a seventh transistor having a control terminal connected to the second pull-up node, an input terminal connected to the third clock signal terminal, and an output terminal connected to the third output signal terminal.

12. The gate driving unit according to claim 6 , wherein the second de-noising module comprises a sixth transistor having a control terminal connected to the second pull-down signal terminal, an input terminal connected to the second output signal terminal, and an output terminal connected to a low level terminal.

13. The gate driving unit according to claim 6 , wherein the third de-noising module comprises an eighth transistor having a control terminal connected to the second pull-down signal terminal, an input terminal connected to the third output signal terminal, and an output terminal connected to a low level terminal.

14. A gate driving circuit comprising a plurality of cascaded gate driving units according to claim 5 ,

wherein a first input signal terminal of a first stage of gate driving unit is connected to an initial signal input terminal;

wherein a first output signal terminal of an N th stage of gate driving unit is connected to a first reset signal terminal of an (N−1) th stage of gate driving unit, where N is an integer greater than or equal to 3;

wherein the first output signal terminal of the N th stage of gate driving unit is connected to a second reset signal terminal of an (N−2) th stage of gate driving unit;

wherein the first output signal terminal of the N th stage of gate driving unit is connected to a first input signal terminal of an (N+1) th stage of gate driving unit; and

wherein a first pull-down signal terminal of the N th stage of gate driving unit is connected to a second pull-down signal terminal of the (N−1) th stage of gate driving unit.

15. A display apparatus comprising a gate driving circuit according to claim 14 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: HAN, MINGFU; SHANG, GUANGLIANG; WOO, HAN-SEUNG-; YAO, XING; JIN, ZHIHE; ZHENG, HAOLIANG; YUAN, LIJUN; WANG, ZHICHONG
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 043353/0458 →
Priority Claims (1)
CN 2017 1 0020679 · Jan 12, 2017 · national
Continuity (1)
Related Publication 20180197455A1 · Jul 12, 2018