Thin film transistor and manufacturing method thereof, array substrate and display device

1. A thin film transistor, comprising:

a substrate;

a gate electrode, a gate insulating layer, an active layer, a source electrode, and a drain electrode provided on the substrate;

wherein the active layer comprises a source region, a drain region, and a channel region between the source region and the drain region, and the channel region has a bending pattern;

the bending pattern is selected from a group consisting of a curved line bending pattern, a straight line bending pattern, and a combination of the curved line bending pattern and the straight line bending pattern; and

the curved line bending pattern is selected from a group consisting of a semicircular ring pattern, a non-closed circular pattern, an S-shaped pattern, and a spiral curved shaped pattern; and

materials of the active layer comprise one-dimensional semiconductive nanomaterials.

2. The thin film transistor of claim 1 , wherein the straight line bending pattern is selected from a group consisting of a semi-square pattern, a non-closed rectangular pattern, a zigzag pattern, and a helical “rectangular-ambulatory-plane” pattern.

3. The thin film transistor of claim 1 , wherein the one-dimensional semiconductive nanomaterials comprise semiconductive carbon nanotubes or semiconductive silicon nanowires.

4. The thin film transistor of claim 3 , wherein the thin film transistor has a top gate type structure or a bottom gate type structure.

5. An array substrate, comprising the thin film transistor of claim 1 and a first electrode electrically connected to the source electrode or the drain electrode of the thin film transistor.

6. The array substrate of claim 5 , wherein the bending pattern is selected from a group consisting of a curved line bending pattern, a straight line bending pattern, and a combination of the curved line bending pattern and the straight line bending pattern.

7. The array substrate of claim 6 , wherein the curved line bending pattern is selected from a group consisting of a semicircular ring pattern, a non-closed circular pattern, an S-shaped pattern, and a spiral curved shaped pattern.

8. The array substrate of claim 5 , wherein the first electrode is a pixel electrode, and the array substrate further comprises a common electrode, and the common electrode and the pixel electrode form an electric field.

9. The array substrate of claim 5 , wherein the first electrode is an anode, and the array substrate further comprises an organic material functional layer and a cathode located above the anode.

10. A display device, comprising the array substrate of claim 5 .

11. A method for manufacturing a thin film transistor, comprising providing a substrate, forming a gate electrode, a gate insulating layer, an active layer, a source electrode, and a drain electrode on the substrate; wherein the active layer comprises a source region, a drain region, and a channel region between the source region and the drain region, the channel region having a bending pattern selected from a group consisting of a curved line bending pattern, a straight line bending pattern, and a combination of the curved line bending pattern and the straight line bending pattern and wherein the curved line bending pattern is selected from a group consisting of a semicircular ring pattern, a non-closed circular pattern, an S-shaped pattern, and a spiral curved shaped pattern; the straight line bending pattern is selected from a group consisting of a semi-square pattern, a non-closed rectangular pattern, a zigzag pattern, and a helical “rectangular-ambulatory-plane” pattern, and

materials of the active layer comprise one-dimensional semiconductive nanomaterials.