Isolation features and methods of fabricating the same

1. A method of fabricating a semiconductor device, comprising:

providing a structure, the structure comprising:

a substrate;

a first fin structure and a second fin structure each extending from the substrate;

a first gate segment over the first fin structure and a second gate segment over the second fin structure, the first and second gate segments extending along a first direction;

a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment;

a second S/D feature over the second fin structure and adjacent to the second gate segment;

an oxygen-containing dielectric layer over the first and second S/D features; and

a trench extending along a second direction between the first and second gate segments and within the oxygen-containing dielectric layer, the trench separating the first and second gate segments, the second direction being generally perpendicular to the first direction, wherein the trench exposes a sidewall of the first gate segment, a sidewall of the second gate segment, and sidewalls of the oxygen-containing dielectric layer;

treating the exposed sidewall of the first gate segment, the exposed sidewall of the second gate segment, and the exposed sidewalls of the oxygen-containing dielectric layer with Ar plasma and a hydrogen-containing reagent, resulting in hydroxyl groups on treated sidewalls of the oxygen-containing dielectric layer;

soaking the treated sidewall of the first gate segment, the treated sidewall of the second gate segment, and the treated sidewalls of the oxygen-containing dielectric layer with an inhibitor bondable to hydroxyl groups, resulting in the inhibitor bonded to the sidewalls of the oxygen-containing dielectric layer; and

after the soaking, depositing a first dielectric layer over the trench, wherein the first dielectric layer is selectively formed on surfaces free of the inhibitor but not on sidewalls of the oxygen-containing dielectric layers to which the inhibitor is bonded.

2. The method of claim 1 , wherein the first dielectric layer comprises silicon nitride and the depositing of the first dielectric layer includes atomic layer deposition (ALD).

3. The method of claim 2 , further comprising depositing a second dielectric layer over the first dielectric layer, wherein the second dielectric layer is different from the first dielectric layer.

4. The method of claim 3 , wherein the second dielectric layer includes silicon oxide.

5. The method of claim 3 , further comprising, after the depositing of the second dielectric layer, performing a chemical mechanical polishing (CMP) process to expose top surfaces of the first and second gate segments.

6. The method of claim 5 , further comprising depositing a silicon nitride layer over the exposed top surfaces of the first and second gate segments.

7. The method of claim 1 , wherein the inhibitor comprises a general formula of SiR 3 L, wherein R denotes an alkyl group and L denote a detachable group.

8. The method of claim 1 , wherein the inhibitor comprises N-Trimethylsilylpyrrole, octadecyltrichlorosilane, or trimethylchlorosilane.

9. The method of claim 1 , wherein the soaking with the inhibitor lasts for about 10 to 40 minutes.

10. The method of claim 1 , wherein the soaking with the inhibitor is performed at a temperature between about 350° C. and 550° C.

11. A method of fabricating a semiconductor device, comprising:

providing a structure, the structure comprising:

a substrate;

a first fin structure and a second fin structure each extending from the substrate;

a first gate segment over the first fin structure and a second gate segment over the second fin structure, the first and second gate segments aligned along a lengthwise direction and separated by a trench extending along a direction parallel to the first and second fin structures;

a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment;

a second S/D feature over the second fin structure and adjacent to the second gate segment; and

an oxygen-containing dielectric layer over the first and second S/D features, wherein the trench is also positioned within the oxygen-containing dielectric layer and between the first and second S/D features;

performing a treatment process to the structure such that exposed surfaces of the oxygen-containing dielectric layer comprise hydroxyl groups;

soaking the structure with an inhibitor bondable to hydroxyl groups to selectively form a steric hindrance layer on the exposed surfaces of the oxygen-containing dielectric layer; and

after the soaking of the structure, depositing a silicon nitride layer over sidewalls of the first and second gate segments in the trench but not over the steric hindrance layer.

12. The method of claim 11 , wherein the performing of the treatment process to the structure comprises directing Ar—H 2 plasma at the structure.

13. The method of claim 11 , wherein the inhibitor comprises a general formula of SiR 3 L, wherein R denotes an alkyl group and L denote a detachable group.

14. A method comprising:

providing a structure, the structure comprising:

a substrate;

a first fin structure and a second fin structure extending from the substrate, the first fin structure being parallel to the second fin structure;

a gate structure over the first and second fin structures;

a first source/drain (S/D) feature over the first fin structure and adjacent to the gate structure;

a second S/D feature over the second fin structure and adjacent to the gate structure;

a first oxygen-containing dielectric layer over the first and second S/D features, the first oxygen-containing dielectric layer disposed between the first and second S/D features;

forming a trench extending along lengths of and between the first and second fin structures to separate the gate structure into a first gate segment over the first fin structure and a second gate segment over the second fin structure; the trench crossing the first oxygen-containing dielectric layer between the first and second S/D features;

performing a treatment process to the structure such that exposed surfaces of the first oxygen-containing dielectric layer comprise hydroxyl groups;

soaking the structure with an inhibitor bondable to the hydroxyl groups to selectively form a steric hindrance layer on the exposed surfaces of the oxygen-containing dielectric layer;

after the soaking of the structure, depositing a nitride-containing dielectric layer over sidewalls of the first and second gate segments exposed in the trench but not over the steric hindrance layer; and

depositing a second oxygen-containing dielectric layer over the nitride-containing dielectric layer and between the first and second gate segments.

15. The method of claim 14 , wherein the nitride-containing dielectric layer comprises silicon nitride or silicon carbide nitride.

16. The method of claim 14 , further comprising:

wherein the second oxygen-containing dielectric layer comprises silicon oxide.

17. The method of claim 16 , further comprising:

after depositing the second oxygen-containing dielectric layer, performing a chemical mechanical polishing (CMP) process to expose top surfaces of the first and second gate segments.

18. The method of claim 14 , wherein the inhibitor comprises a general formula of SiR 3 L, wherein R denotes an alkyl group and L denote a detachable group.

19. The method of claim 14 , wherein the inhibitor comprises N-Trimethylsilylpyrrole, or octadecyltrichlorosilane.

20. The method of claim 14 , wherein the soaking with the inhibitor is performed at a temperature between about 350° C. and 550° C.