IP Library Granted Patent US 10,509,232
Granted Patent B2
US 10,509,232 · App. 13/609,538 · Granted Dec 17, 2019

Stereoscopic image display device using spatial-divisional driving and method of driving the same

Inventor: Juyoung Lee (Paju-si, KR)
Assignee: LG Display Co., Ltd.
G02B27/26G02B5/3083G02B27/2264G09G3/003G09G3/3648H04N13/337H04N13/341H04N13/398G09G2310/0218G09G2310/0224G09G2320/0209G09G2340/0435H04N2213/002
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,509,232
App. No.
13/609,538
Granted
Dec 17, 2019
Kind
B2
Abstract

A stereoscopic image display device and a method of driving the same are provided. The stereoscopic image display device includes: a display panel; a patterned retarder transmitting light from the display panel as first and second polarization components; a data driving circuit driving data lines of the display panel; a gate driving circuit driving gate lines of the display panel; a 3D formatter: separating input 3D image signal into first and second eye image data; and arranging the first and second eye image data according to a vertical k-divisional operation to generate an original frame; and a timing controller: dividing one frame into k sub-fields with time-divisional driving; and controlling the data driving circuit and the gate driving circuit such that: the first eye image data are displayed in odd-numbered sub-fields with spatial-divisional driving; and the second eye image data are displayed in even-numbered sub-fields with spatial-divisional driving.

Claims (82)

1. A stereoscopic image display device, comprising:

a display panel including a plurality of pixels arranged in odd-numbered pixel lines and even-numbered pixel lines;

a patterned retarder configured to transmit light from the display panel as a first polarization component and a second polarization component;

a data driving circuit configured to drive data lines of the display panel;

a gate driving circuit configured to drive gate lines of the display panel, the gate lines including a plurality of odd-numbered gate lines and a plurality of even numbered gate lines;

a three-dimensional (3D) formatter configured to:

receive a frame of input 3D image data having a first eye image data and a second eye image data alternately arranged;

separate the frame of input 3D image data into the first eye image data and the second eye image data; and

arrange the separated first eye image data and second eye image data according to a vertical k-divisional operation to generate a top and down type original frame, where k is a positive even number, the top and down type original frame comprising:

the first eye image data arranged in a first set of contiguous lines; and

the second eye image data arranged in a second set of contiguous lines, the second set of contiguous lines beginning immediately subsequently to the first set of contiguous lines; and

a timing controller configured to:

receive timing signals at an input frame frequency f from a 3D processor;

divide the top and down type original frame from the 3D formatter directly into k sub-fields with time-divisional driving so that each odd-numbered sub-field has at least a portion of the arranged first eye image data and each even-numbered sub-field has at least a portion of the arranged second eye image data; and

control the data driving circuit and the gate driving circuit at a frame frequency N×f based on the k sub-fields, where N is a positive number equal to or greater than 2, such that:

at a first time period in one frame, the gate driving circuit sequentially supplies odd-numbered scan pulses respectively to the odd-numbered gate lines only in a first sub-field to display the arranged first eye image data in the first sub-field on the odd-numbered pixel lines of the display panel in the first sub-field only, without supplying any scan pulse to any of the even-numbered gate lines; and

then, at a second time period in the one frame and subsequent to the first time period, the gate driving circuit sequentially supplies even-numbered scan pulses respectively to the even-numbered gate lines only in a second sub-field to display the arranged second eye image data in the second sub-field on the even-numbered pixel lines of the display panel in the second sub-field only, without supplying any scan pulse to any of the odd-numbered gate lines.

2. The stereoscopic image display device of claim 1 , wherein:

the first eye image data of the top and down type original frame is aligned to be displayed in at least one odd-numbered sub-field; and

the second eye image data of the top and down type original frame is aligned to be displayed in at least one even-numbered sub-field.

3. The stereoscopic image display device of claim 2 , wherein the first eye image data displayed in the at least one odd-numbered sub-field are spatially separated from the second eye image data displayed in the at least one even-numbered sub-field.

4. The stereoscopic image display device of claim 2 , wherein:

the first eye image data displayed in a plurality of odd-numbered sub-fields are spatially separated from each other; and

the second eye image data displayed in a plurality of even-numbered sub-fields are spatially separated from each other.

5. The stereoscopic image display device of claim 2 , further comprising a data interpolator configured to insert at least one interpolation frame between the original frames input from the 3D formatter.

6. The stereoscopic image display device of claim 1 , wherein the timing controller is further configured to control the data driving circuit to:

supply the first eye image data in the first sub-field to the data lines according to a sequence of the odd-numbered scan pulses in the first sub-field; and

supply the second eye image data in the second sub-field to the data lines according to a sequence of the even-numbered scan pulses in the second sub-field.

7. The stereoscopic image display device of claim 1 , wherein:

the gate driving circuit is further configured to:

sequentially generate (4n−3) th scan pulses in the first sub-field to supply them to (4n−3) th gate lines;

sequentially generate (4n−2) th scan pulses in the second sub-field to supply them to (4n−2) th gate lines;

sequentially generate (4n−1) th scan pulses in a third sub-field to supply them to (4n−1) th gate lines; and

sequentially generate (4n) th scan pulses in a fourth sub-field to supply them to (4n) th gate lines,

where n is a positive integer; and

the data driving circuit is configured to:

supply a first portion of the first eye image data to the data lines according to a sequence of the (4n−3) th scan pulses scan pulses in the first sub-field;

supply a first portion of the second eye image data to the data lines according to a sequence of the (4n−2) th scan pulses in the second sub-field;

supply a second portion of the first eye image data to the data lines according to a sequence of the (4n−1) th scan pulses scan pulses in the third sub-field; and

supply a second portion of the second eye image data to the data lines according to a sequence of the (4n) th scan pulses in the fourth sub-field.

8. The stereoscopic image display device of claim 1 , wherein:

the first eye image data comprises left eye image data; and

the second eye image data comprises right eye image data.

9. The stereoscopic image display device of claim 1 , wherein the timing control signals includes: a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a dot clock signal.

10. The stereoscopic image display device of claim 1 , wherein the timing controller is further configured to supply a data control signal to the data driving circuit and a gate control signal to the gate driving circuit at the frame frequency N×f.

11. The stereoscopic image display device of claim 1 , wherein the 3D processor includes the 3D formatter.

12. A method of driving a stereoscopic image display device comprising a display panel having a plurality of pixels arranged in odd-numbered pixel lines and even-numbered pixel lines, a patterned retarder that transmits light from the display panel as a first polarization component and a second polarization component, a data driving circuit that drives data lines of the display panel, and a gate driving circuit that drives gate lines of the display panel, the gate lines including a plurality of odd-numbered gate lines and a plurality of even-numbered gate lines, the method comprising:

receiving a frame of input three-dimensional (3D) image data having a first eye image data and a second eye image data alternately arranged;

separating the frame of input three-dimensional (3D) image data into the first eye image data and the second eye image data;

arranging the separated first eye image data and second eye image data according to a vertical k-divisional driving operation to generate a top and down type original frame, where k is a positive even number, the top and down type original frame comprising:

the first eye image data arranged in a first set of contiguous lines; and

the second eye image data arranged in a second set of contiguous lines, the second set of contiguous lines beginning immediately subsequently to the first set of contiguous lines;

receiving timing signals at an input frame frequency f;

dividing the top and down type original frame directly into k sub-fields with time-divisional driving so that each odd-numbered sub-field has at least a portion of the arranged first eye image data and each even-numbered sub-field has at least a portion of the arranged second eye image data; and

controlling the data driving circuit and the gate driving circuit at a frame frequency N×f based on the k sub-fields, where N is a positive number equal to or greater than 2, to:

at a first time period in one frame, sequentially supply odd-numbered scan pulses respectively to the odd-numbered gate lines only in a first sub-field to display the arranged first eye image data in the first sub-field on the odd-numbered pixel lines of the display panel in the first sub-field only, without supplying any scan pulse to any of the even-numbered gate lines; and

then, at a second time period in the one frame and subsequent to the first time period, sequentially supply even-numbered scan pulses respectively to the even-numbered gate lines only in a second sub-field to display the arranged second eye image data in the second sub-field on the even-numbered pixel lines of the display panel in the second sub-field only, without supplying a scan pulse to any of the odd-numbered gate lines.

13. The method of claim 12 , wherein:

the first eye image data of the top and down original frame is aligned to be displayed in at least one odd-numbered sub-field; and

the second eye image data of the top and down original frame is aligned to be displayed in at least one even-numbered sub-field.

14. The method of claim 13 , wherein the first eye image data displayed in the at least one odd-numbered sub-field are spatially separated from the second eye image data displayed in the at least one even-numbered sub-field.

15. The method of claim 13 , wherein:

the first eye image data displayed in a plurality of odd-numbered sub-fields are spatially separated from each other; and

the second eye image data displayed in a plurality of even-numbered sub-fields are spatially separated from each other.

16. The method of claim 12 , wherein the controlling of the data driving circuit and the gate driving circuit includes:

sequentially generating (4n−3) th scan pulses in the first sub-field to supply them to (4n−3) th gate lines;

sequentially generating (4n−2) th scan pulses in the second sub-field to supply them to (4n−2) th gate lines;

sequentially generating (4n−1) th scan pulses in a third sub-field to supply them to (4n−1) th gate lines; and

sequentially generating (4n) th scan pulses in a fourth sub-field to supply them to (4n) th gate lines,

supplying a first portion of the first eye image data to the data lines according to a sequence of the (4n−3) th scan pulses scan pulses in the first sub-field;

supplying a first portion of the second eye image data to the data lines according to a sequence of the (4n−2) th scan pulses in the second sub-field;

supplying a second portion of the first eye image data to the data lines according to a sequence of the (4n−1) th scan pulses scan pulses in the third sub-field; and

supplying a second portion of the second eye image data to the data lines according to a sequence of the (4n) th scan pulses in the fourth sub-field,

wherein n is a positive integer.

17. The method of claim 12 , wherein:

the first eye image data comprises left eye image data; and

the second eye image data comprises right eye image data.

18. The method of claim 12 , wherein the timing control signals includes: a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a dot clock signal.

19. The method of claim 12 , wherein the controlling of the data driving circuit and the date driving circuit includes supplying a data control signal to the data driving circuit and a gate control signal to the gate driving circuit at the frame frequency N×f.

20. The method of claim 12 , wherein the controlling of the data driving circuit and the gate driving circuit includes:

supplying the first eye image data in the first sub-field to the data lines according to a sequence of the odd-numbered scan pulses in the first sub-field; and

supplying the second eye image data in the second sub-field to the data lines according to a sequence of the even-numbered scan pulses in the second sub-field.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2012
From: LEE, JUYOUNG
To: LG DISPLAY CO., LTD.
Reel/Frame 028935/0853 →
Priority Claims (1)
KR 10-2011-0129556 · Dec 6, 2011 · national
Continuity (1)
Related Publication 20130141402A1 · Jun 6, 2013
Cited By (1)
US 12,581,051